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Routing in a Three-Dimensional Chip
Tong C., Wu C. IEEE Transactions on Computers44 (1):106-117,1995.Type:Article
Date Reviewed: Apr 1 1996

A pseudo-three-dimensional routing for a chip with standard cells on multiple planes is presented. For each component plane of standard cells, the routing channel is defined between cell rows as conventional standard cell layout with two-layer metals. The channels are aligned among all component planes. Between two component planes, there is a routing plane for inter-component-plane routing. The inter-component-plane routing channel is the routing region sandwiched between two channels of two adjacent component planes.

The inter-component-plane channel serves as a feed-through for interconnection between different component planes. The paper discusses the constraints of feed-through assignment. A heuristic algorithm is proposed to minimize the channel density. A toy example is used to illustrate the effects of the method.

Reviewer:  C. K. Cheng Review #: CR119412 (9604-0266)
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Placement And Routing (B.7.2 ... )
 
 
VLSI (Very Large Scale Integration) (B.7.1 ... )
 
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