When talking about fault tolerance, we seek to put in place mechanisms that would keep a system running with minimal degradation, despite the malfunctioning of a component. Typically, in the case of failure, redundant components jump into place and build consensus via voting. This paper looks into building fault tolerance in a circuit design by designing circuits with no single points of failure. The issue of fault tolerance now becomes a rather continuous problem that involves considerations about the distribution of the degradation effects, as opposed to the one-time (digital, finite) incident of a one-component failure in systems with single points of failure.

The significance of this paper is at least two-fold. First, it provides a great overview and taxonomy of existing literature and approaches. Second, the authors have actually emulated the systems discussed.

The paper is a pleasure to read, and very easy to follow. There are abundant explanations and figures that support the claims and findings. The generation of the circuits is supported by the implementation of genetic algorithms, with cleverly chosen parameters and fitness functions. Despite intuitive expectations that the building of these circuits would drastically increase the amount of hardware components used, this paper indicates that it may not be so.

Although it does not cover the universal case of building circuits that “rock,” even when components fail, this is still a well-done paper that motivates further research into specific types of circuits.