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Multirate VLSI arrays and their synthesis
Lenders P., Rajopadhye S. IEEE Transactions on Software Engineering23 (9):515-529,1997.Type:Article
Date Reviewed: Feb 1 1998

Multirate arrays are an extension of the idea of systolic arrays in which different data streams can propagate at different rates, that is, using different clock ticks. Applications in signal and image processing can often be implemented using regular systolic arrays. Multirate arrays offer the potential for improved performance. This paper presents a framework for the analysis and synthesis of multirate arrays.

The framework is based on what the authors call “affine recurrence equations” (AREs), formalisms that describe a complete recurrence, including any initial or terminal parts. Conventional systolic arrays, in this terminology, are represented by uniform recurrence equations (UREs). The authors describe the basic ideas of AREs. Unfortunately, their choice of notation tends to obscure the real nature of the beast. Maybe a three-part definition, in which initial and terminal parts are separated from the main body of the recurrence, would help.

The authors describe transformation rules for this class of equations, then use these to address the synthesis of multirate arrays. In particular, they show how a multirate array can be derived from systems of sparse UREs. The whole process is illustrated by means of an ongoing example in which a new third-order decimation filter is developed.

Reviewer:  Peter Turner Review #: CR121069 (9802-0071)
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Array And Vector Processors (C.1.2 ... )
 
 
Recurrences And Difference Equations (G.2.1 ... )
 
 
Applications (I.4.9 )
 
 
VLSI Systems (C.5.4 )
 
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