VHDL is the Very High Speed Integrated Circuit (VHSIC) Hardware Description Language that was standardized as ANSI/IEEE standard 1076 in 1987 (this version is known as VHDL’87) and reballoted in 1993 (as VHDL’93). It is a strongly typed, verbose language that is sometimes hard to understand; its opponents call it the Very Hard Description Language. The perception of VHDL as a non-user-friendly language almost sparked a religious war between VHDL and Verilog proponents, so VHDL was fully embraced by users and CAD tool developers much later than expected (Verilog is another hardware description language, which was initially developed by Cadence and is now also in the public domain). VHDL was originally targeted at simulation and hardware documentation, but most of its recent success has been in applications in synthesis, testing, and verification.

VHDL is fully described in the Language Reference Manual (LRM) [1], but the LRM, although accurate, is not enough for a designer to start using the language productively. Therefore, there are many books about programming in VHDL for simulation or synthesis. The language is general and complex, and you will probably need more than one book and a lot of hands-on experience in order to become proficient.

The six books reviewed here are among the most recent, and they cover most of the spectrum in terms of intended audience (from engineering students to professors, experienced designers, and even managers), level of VHDL understanding (from beginner to experienced user), and VHDL use (mainly documentation, simulation, and synthesis). There is not much about formal verification using VHDL in any of these books. Almost all major publishers of VHDL books are represented, with the exception of Morgan Kaufmann.

Airiau, Berge, and Olive

I found this book extremely well written and, although it is not very long, it covers all aspects of VHDL synthesis thoroughly. VHDL was initially developed for simulation, so not all language constructs are synthesizable. Focusing only on VHDL-based synthesis, this book goes deeper into the subject than other books. Chapter 1, “About Synthesis,” defines the purpose of the book, while chapter 2, “VHDL Concepts,” is a short tutorial on VHDL. The authors present both a top-down synthesis flow in chapter 3, “Mapping VHDL to Hardware,” and a bottom-up synthesis flow in chapter 4, “Mapping Hardware to VHDL.” The idea in chapter 3 is to derive hardware implementations for common VHDL constructs, while in chapter 4 several VHDL description styles are presented by starting with common hardware components (gates, multiplexers, latches, flip-flops, PLAs, and so on). All the examples are useful as starting points for writing your own VHDL synthesizable code in either a top-down fashion (typically behavioral style at register transfer level (RTL)) or a bottom-up one (typically structural style at RTL or gate level).

Chapters 5, “Design Methodology,” and 6, “Synthesis Standard Environment,” show the big picture of how to integrate VHDL synthesis into existing design methodologies and synthesis environments. A comprehensive case study that describes and synthesizes the ubiquitous traffic light controller example concludes an excellent book on VHDL synthesis.

Armstrong and Gray

This is the only textbook, and the only book written by professors, among the six books reviewed. It has good exercises at the end of each chapter, and it has an excellent index and the best references. It is not about VHDL as a language, but about doing structured design with VHDL. The academic background of the authors can be seen from the start in the care with which they define the design process and the abstraction hierarchy in chapter 1, “Structured Design Concepts,” and the CAD tool taxonomy in chapter2, “Design Tools.” Chapter 3 gives some “Basic Features of VHDL,” and chapter 4 goes into “Basic VHDL Modeling Techniques.” The three design modeling levels as applied to VHDL are described in chapter 5, “Algorithmic Level Design,” chapter 6, “Register Level Design,” and chapter 7, “Detailed Gate Level Design.” Chapter 8, “Multilevel Design,” describes more complex examples, such as Moore and Mealy state machines and microprogrammed control units. Chapter 9, “Algorithmic Synthesis,” deals with some high-level design topics that you will not find in any of the other books reviewed here, including scheduling, allocation, and automated synthesis of VHDL constructs. The appendix describes the four-valued logic system package used for many examples in the book.

Although intended as a textbook for an undergraduate or graduate course in logic design, the book can be a useful reference for practicing designers who want to understand digital design at a higher level of abstraction. In conjunction with some VHDL design software tools, the book can also be used for a self-taught course with the help of the many exercises. Solutions to the problems are not provided.

Baker

This is probably the most ambitious of the six books in that it covers the broadest range of subjects, including such exotic and unrelated topics as Petri nets, semaphores, waveform relaxation, and microprocessor superscalar architectures. Unfortunately, there can be no depth when trying to address so many topics in a book of this length; this can be seen in the large number of chapters (16), which means that individual chapters are short (ten pages or fewer for chapters 4, 7, 8, and 9). Nonetheless, the book can be useful for pointers to the literature on the advanced topics it discusses, since it has good chapter-by-chapter references. Useful subjects mentioned here and not discussed in any of the other books are standardization efforts like Waveform and Vector Exchange Specification (WAVES, IEEE Standard 1029.1), Standard Delay Format (SDF), Electronic Data Interchange Format (EDIF, ANSI/EIA Standard RS-548), and JTAG Boundary Scan Architecture (IEEE Standard 1149.1).

The book is divided into two parts. The first part is a “VHDL Tutorial” consisting of ten chapters:

• Introduction

• Signals

• Entity, Architecture, Configuration Statements

• Blocks and Guards

• Data

• Attributes

• Sequential Statements

• Concurrent Statements

• Packages, Libraries, Input/output

• VHDL-92 and Miscellaneous Topics

Bhasker

The books by Baker and Bhasker are at two extremes: while Baker tries to leave nothing uncovered but in this way becomes superficial, Bhasker’s book contains thorough coverage of VHDL basics. Some advanced VHDL topics, including VHDL synthesis, are not explored, but this leaves more room for explaining the important issues. The beginner will definitely appreciate this focus on introductory topics as well as the large number of examples.

After a short chapter 1, “Introduction,” chapter 2 presents “A Tutorial” that briefly introduces VHDL terminology, design units, and modeling styles. These topics are later expanded in chapter 3, “Basic Language Elements,” chapter4, “Behavioral Modeling,” chapter 5, “Dataflow Modeling,” chapter 6, “Structural Modeling,” chapter 7, “Generics and Configurations,” chapter 8, “Subprograms and Overloading,” and chapter 9, “Packages and Libraries.” Some “Advanced Features” including aliases, type conversions, guarded signals, attributes, and shared variables are presented in chapter10. Chapter 11, “Model Simulation,” looks at the challenges of using VHDL for writing a test bench. Chapter12, “Hardware Modeling Examples,” gives a thorough introduction to using VHDL for describing hardware. This chapter can also be used for bottom-up synthesis. The four appendices are excellent. Appendix A, “Predefined Environment,” lists the VHDL’93 reserved words and the two standard VHDL packages: STANDARD and TEXTIO. Appendix B is a “VHDL Syntax Reference”; Appendix C describes ATT_MVL, the four-level logic system package used in the book; and Appendix D gives a short but useful “Summary of Changes” from VHDL’87 to VHDL’93.

The author has chosen to introduce topics in a gradual manner, with some basic information first, followed by a more advanced discussion in another chapter. This treatment asks for a sequential reading and is valid when first learning the language. It becomes more of a problem when trying to find a specific topic in the book.

Ott and Wilderotter

A large number of examples that can be used and adapted for your own designs make this book useful. If you have a clear picture of the VHDL synthesis process and need some more modeling examples, this book is for you. Also, if you are a manager trying to include VHDL synthesis in the design process, there is some information for you here. The book is less structured than I would like, however, which makes it hard to read the book and follow ideas.

The first two chapters, “Introduction” and “Making the Transition to VHDL Synthesis,” are so introductory that they are almost nontechnical. Chapter 3, “VHDL Background for Synthesis,” defines VHDL constructs relevant to synthesis. Chapter 4, “Synthesis of Sequential Circuits,” has introductory examples of counter and state machine designs, which are further refined in chapter 5, “Sequential Counter Applications,” and chapter 6, “Control Logic and State Machines.” Adders, multipliers, and register stacks are described in chapter 7, “Data Processing Functions.” General-purpose combinational logics such as gates, multiplexers, comparators, and decoders are treated in chapter 8, “Combinational Logic and Optimization.” The authors’ choice to describe combinational circuits after sequential circuits is puzzling. Chapter 9, “Putting the Pieces Together,” discusses design hierarchies, complete ASIC designs, and VHDL simulation and test bench generation. The last two chapters, “Evaluating a Synthesis System” and “Future Prospects for ASIC Synthesis,” bring the discussion back to the nontechnical level of the first two chapters, presumably in order to address the managerial audience.

Perry

For many designers, this book is the VHDL bible, and with good reason. It is well written in a top-down manner, and its 12 chapters contain most of the information you need about VHDL. Beginners will find chapter 1, “Introduction,” a useful short VHDL tutorial; chapter 2, “Behavioral Modeling,” chapter 3, “Sequential Processing,” and chapter 4, “Data Types,” will also be useful to beginners. More advanced readers will appreciate chapter 5, “Subprograms and Packages,” chapter 6, “Predefined Attributes,” chapter 7, “Configurations,” and chapter 8, “Advanced Topics.” Designers involved in VHDL synthesis will find essential reading in chapter 9, “Synthesis,” and chapter 10, “VHDL Synthesis,” as well as the comprehensive example of a vending machine in chapter 11, “Top-level System Design,” and chapter 12, “Vending Machine: First Decomposition.” The four appendices describe the STD_LOGIC_1164 nine-value standard logic package used throughout the book; give a rather useless, long, and unreadable gate-level netlist of the vending machine example as compiled by the Synopsis Design Compiler; present some interesting VHDL reference tables that are useful when writing VHDL descriptions; and explain the VHDL Backus-Naur form (BNF) used in the LRM.

The book is filled with examples that readers can use as starting points for their own designs. Since it is a second edition, many of the bugs inherent in a first edition have been eliminated. Out of the six books, this comes closest to being a reference book. It will be especially useful for simulation, but it can also be used for testing and synthesis.

No book is perfect, though, and this book has its flaws. It is based on VHDL’87 and not on the newer VHDL’93, and this may soon mean that a third edition of this successful book will make the second edition obsolete. It contains little information on VHDL structural modeling, and the lack of a bibliography is annoying.

Comparison

All six books do a decent job of presenting basic VHDL terminology and VHDL design units, such as entity, architecture, configuration, package, and package body. They also present a more or less clear perspective on VHDL modeling styles (behavioral, structural, or mixed) and VHDL modeling levels (architectural, data flow, gate level, or multilevel). Three of the books (the two synthesis books and the Perry book) are based solely on the standardized 9-valued IEEE 1164 logic system. The Armstrong and Gray and the Baker books describe a series of different logic systems (4-valued, 7-valued, 46-valued, and so on) while the VHDL primer by Bhasker uses only a simple 4-valued logic system.

Several of these books are based on the original VHDL’87 standard, while others are based on the newer VHDL’93. The changes from VHDL’87 to VHDL’93 are in general minor (though there is an entire book explaining these changes [2]) and were made with upward compatibility in mind. Many commercial tools are not yet supporting VHDL’93. The VHDL standard was initially scheduled to be reballoted in 1992, which is why the new standard is called VHDL’92 in some of the books. The term behavioral modeling has conflicting meanings: for example, in the Perry book it denotes modeling based on concurrent statements, while in the Bhasker book it refers to sequentially executed procedural code.

As a general-purpose reference book, Perry remains my favorite. It can be successfully used by both beginners and advanced designers, and a third edition should probably address the few remaining weak areas. For beginners or those who want to use VHDL’93 now, Bhasker can be a decent alternative.

For someone involved in VHDL synthesis, I recommend the Airiau, Berge, and Olive book. It has a clear and illuminating way of presenting arid topics. After reading it, you will really understand what VHDL synthesis is all about and be able to start using it. If you need a lot of small coding examples, the Ott and Wilderotter book will provide those.

For the academically inclined reader, Armstrong and Gray is excellent. I really enjoyed reading it. It is also the only one providing exercises.

As for the Baker book, if you know a lot about VHDL and are looking for advanced topics, you may find some references in here, but you will also have to read those references, since the book has a lot of breadth but not much depth.