The testing of digital circuits has become more and more important as the complexity of digital systems has increased. Testing in the hardware world means verifying that a circuit has been manufactured properly. Checking that the design meets specifications, the meaning of software testing, is called design verification.
Work in testing can be split into two areas: generating and applying the test. As circuit complexity has increased, the job of test generation has become unmanageable with traditional techniques. This excellent book describes techniques for the automatic generation and evaluation of tests, and techniques for designing digital circuits in ways to make test generation easier.
The first part of the book, Logic Testing, covers test generation algorithms, fault simulation techniques, and the complexity of testing. The chapter on test generation covers the D Algorithm and PODEM, the two major algorithms for gener- ating tests for combinational circuits. It also describes FAN, an algorithm developed by Fujiwara. He gives just the right amount of detail, giving both flow charts and examples of the operation of the algorithms. I believe that there is adequate detail to allow implementation of any of these methods.
The chapter on fault simulation covers the three major techniques for efficient simulation: parallel, deductive, and concurrent. Most of the chapter is spent on deductive simulation, instead of the more popular concurrent technique. A section on simulation accelerators at the end of the chapter is already out of date, since it does not mention commercially available accelerators.
Design for Testability, the subject of the book’s second section, usually involves adding hardware to make internal nodes in a circuit easier to control and observe. After an introduction to testability measures and concepts, a chapter covers techniques that make combinational circuits testable by a small, constant, number of patterns. Unfortunately, the amount of extra hardware required for this is too large to make the technique practical, though it is of great theoretical interest. The next chapter describes techniques to reduce the cost of test generation, either through circuit partitioning or by adding hardware. The special case of PLAs, for which easily testable implementations exist, is also covered.
The last two chapters are of intense practical importance. The first, on scan design, describes a technique by which sequential circuits can be tested as combinational circuits by connecting all the flip flops into a shift register. This technique, pioneered by IBM, cuts test generation efforts substantially. Several varieties of scan design are described. The last chapter describes ways in which a circuit can test itself by configuring the scan chain into a linear feedback shift register to be used for pseudorandom pattern generation and data compression. The area of Design for Testability is in flux, with no method widely accepted and successful yet (except for the general area of scan design). Thus, this section is somewhat choppy.
In summary, this is an excellent introduction to several areas of testing, and is good preparation for reading the current literature. Inevitably, some sections are out of date already, and some are more a survey of existing work than an integrated description. However, the book is the best reference on current testing theory and practice I know. I recommend it for anyone planning to look at the field.
