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Automatic test generation for combinational threshold logic networks
Gupta P., Zhang R., Jha N. IEEE Transactions on Very Large Scale Integration (VLSI) Systems16 (8):1035-1045,2008.Type:Article
Date Reviewed: Jun 12 2009

Two nanoscale devices that implement threshold logic are resonant tunneling diodes (RTDs) and quantum cellular automata (QCA). A threshold logic gate (TLG) computes the sign of the weighted sum of its inputs, compared with a threshold.

Although complementary metal-oxide-semiconductor (CMOS) implementations of Boolean logic are currently used, the expectation is that with the ongoing advancements to the material science, future high-performance systems will be predominantly designed with TLGs. Very large-scale integration (VLSI) implementations of threshold logic already exist.

The synthesis and optimization of threshold logic networks is an open area of research. Neither the technology nor the methodology is mature enough to be usable in production today. A key problem in translating a given Boolean function into threshold logic is determining whether the given function is a threshold function. Methods based on linear programming are used for this purpose.

Gupta, Zhang, and Jha “propose an automatic test pattern generation (ATPG) framework for combinational threshold networks[,] to be used only after threshold synthesis has been done on Boolean circuits.” They claim that by using the methodology presented here, they can accomplish significant fault coverage on ISCAS-85 benchmarks, with a lower number of random vectors.

The paper provides relevant background material, followed by a fault model for the devices under consideration. The presented fault model is validated using Haileys’ simulation program with integrated circuit emphasis (HSPICE) simulations.

The core algorithms are described in Section 4. The ideas here follow along the lines of the classic D algorithm. Although the theory is pleasant to read, the proofs are so simple and follow so directly from elementary algebra that labeling a theoretical result as a theorem appears to be an overstatement. However, Theorem 5 is a significant and important contribution.

Overall, the paper is well written. It aims to develop technologies that will be applicable in the near future. “Threshold logic is once again becoming an active area of research”; compared to Boolean logic, it has the potential to offer area-optimal circuits.

Reviewer:  Paparao Kavalipati Review #: CR136954 (1002-0159)
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