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  Browse All Reviews > Hardware (B) > Logic Design (B.6) > Design Aids (B.6.3)
 
  Design Aids (B.6.3) See Reviews  
 
Subject Descriptors:
Automatic Synthesis (18)
Hardware Description Languages (25)
Optimization (16)
Simulation (23)
Switching Theory (19)
Verification (22)
 
Proper Nouns:
Dif (1)
Flex (1)
Verilog (7)
VHDL (16)
 
 
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Reviews about "Design Aids (B.6.3)":
Date Reviewed
Modeling memristor radiation interaction events and the effect on neuromorphic learning circuits
Dahl S., Ivans R., Cantley K.  ICONS 2018 (Proceedings of the International Conference on Neuromorphic Systems, Knoxville, TN, Jul 23-26, 2018) 1-8, 2018.  Type: Proceedings
Jan 28 2019
Digital logic design using Verilog: coding and RTL synthesis
Taraate V., Springer International Publishing, New York, NY, 2016. 416 pp.  Type: Book (978-8-132227-89-2)
Apr 27 2017
Effective coding with VHDL: principles and best practice
Jasinski R., The MIT Press, Cambridge, MA, 2016. 624 pp.  Type: Book (978-0-262034-22-7)
Dec 7 2016
 Delay/power modeling and optimization of FinFET circuit modules under PVT variations: observing the trends between the 22nm and 14nm technology nodes
Tang A., Gao X., Chen L., Jha N. ACM Journal on Emerging Technologies in Computing Systems 12(4): 1-21, 2016.  Type: Article
Apr 28 2016
Embedding of large Boolean functions for reversible logic
Soeken M., Wille R., Keszocze O., Miller D., Drechsler R. ACM Journal on Emerging Technologies in Computing Systems 12(4): 1-26, 2015.  Type: Article
Feb 22 2016
Verilog HDL simulator technology: a survey
Tan T., Rosdi B. Journal of Electronic Testing: Theory and Applications 30(3): 255-269, 2014.  Type: Article, Reviews: (2 of 2)
Jun 30 2015
Verilog HDL simulator technology: a survey
Tan T., Rosdi B. Journal of Electronic Testing: Theory and Applications 30(3): 255-269, 2014.  Type: Article, Reviews: (1 of 2)
May 27 2015
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