The paper begins with a reliability analysis to justify the selection of pipeline stages as the granularity level for redundant elements. StageNetSlice (SNS) is a complete pipeline design, modified to allow reconfiguration. The CMP system is a set of parallel pipelines made reconfigurable by connecting successive stages with replicated crossbar switches. The severe performance penalties introduced into the pipeline to achieve reconfiguration are alleviated by adding additional redundant elements.

The example design with five pipelined parallel computers gives up 11 percent in performance and 12 percent in area, compared to a design with no redundancy. I consider that an excellent investment. Gupta et al. claim that the final design is highly robust; I agree. The reliability of the final design is an open question, since the authors do not present details related to fault detection, fault diagnosis, and reconfiguration algorithms. Clearly, these operations must also be fault tolerant, in order to achieve high levels of reliability. Fault coverage is also not discussed. This is a critical issue, particularly as it relates to the fault detection, diagnosis, and reconfiguration strategies.

This paper contains a considerable amount of useful information related to the design of reconfigurable, multiprocessor-pipelined architectures. However, the reader must superimpose his or her own fault detection, diagnosis, and reconfiguration strategies onto the proposed design and depend on the robustness of the design to support these activities.