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Microprocessors: a programmer’s view
Dewar R., Smosna M., McGraw-Hill, Inc., New York, NY, 1990. Type: Book (9789780070166387)
Date Reviewed: Jul 1 1992

A graduate-level special topics course covering current developments in microprocessors, including both RISC and CISC architectures, is the basis of this outstanding text. The authors present 14 chapters of material. The first chapter gives a relatively traditional view of microprocessor registers, instruction formats, data representation, memory organization, addressing, procedure calls, and exception handling. The next three chapters cover the same range of topics for the Intel 80386, with one chapter devoted to the 80386 architecture and to interactions between the operating system and the hardware (tasking, virtual memory, and exceptions). The first part of chapter 5 is a generalized discussion of floating point arithmetic, emphasizing the IEEE standard, while the last part covers implementation-specific details for the Intel 80387 and Weitek chipsets. Chapters 6 and 7 cover the Motorola 68030. Chapter 8 introduces RISC architecture, differentiates RISC and CISC, and provides a modest history of RISC from the CDC 6600 to the IBM 801, Berkeley RISC, and Stanford MIPS project. Chapters 9 through 13 cover the major RISC architectures available as of the publication date: MIPS, Sun’s SPARC, Intel i860, IBM RIOS, and INMOS Transputer. Finally, chapter 14 looks to recent developments in instruction set design, the response of CISC designers, and the RISC versus CISC debates.

In addition, the book contains a modest but useful glossary; a two-page bibliography, which is short given the amount of information available in this area; and an adequate index. No student exercises are provided.

It is hard to describe the best features of the book, since it has many. This book does not simply reorganize factual material for more effective presentation to the student. It is, first, a balanced view of RISC and CISC architectures. It does not attempt to sharply differentiate or classify the two architectures, or obviously take sides, nor does it ignore the real differences. It presents a reasonable argument that the RISC work at IBM, Berkeley, and Stanford, among others, has contributed to the general advancement of computer architecture and that the distinction between RISC and CISC is becoming less obvious as both architectures change and mature.

The authors add significant value to the book by going beyond simply reporting facts to explore the results of design decisions (such as the use of little-endian bit ordering and big-endian byte ordering in the 68000 series documentation). The balanced mixture of hardware, software, and operating systems interfaces is refreshing. Chapter 4 covers descriptor tables, context switching, segmentation, page faults, and exception handling in the 80386, which is extremely useful. The authors are diligent throughout the book in raising issues and difficulties caused by architecture and implementation choices. In addition, the text is easy to read and adequately (but not profusely) illustrated.

The material is not without flaws. The authors cover a lot of ground, so much material is not presented in enough depth for detailed hardware or software design. The book is far more effective in engaging the reader in understanding the architectural design process, issues, and tradeoffs rather than detailed implementation. Given that the authors critically review many design decisions, some of their conclusions and style of presentation can be questioned (for instance, it may be impossible or at least extremely difficult to fully pipeline a CISC instruction set like that found on the 80386 or 68030).

The fact that the timing did not allow the authors to base the chapter on IBM RISC on the RS/6000 chipset is unfortunate. Instead, it is derived from the basic architectural elements described by IBM in October 1989 at the IEEE International Conference on Computer Design and in the trade press. Access to and inclusion of the more recent information from IBM would significantly enhance the work. The authors should seriously consider an update to include this material.

I highly recommend the material for teachers, students, and practitioners alike.

Reviewer:  Robert E. Mahan Review #: CR114502
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Microprocessors (C.5.3 ... )
 
 
Instruction Set Design (C.0 ... )
 
 
Styles (B.5.1 ... )
 
 
Design Styles (B.2.1 )
 
 
Design Styles (B.3.2 )
 
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