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	Browse All Reviews > Computer Systems Organization (C) > General (C.0) > Instruction Set Design (C.0...)     Options: All Media Types Journals Proceedings Div Books Whole Books Other Date Reviewed Title Author Publisher Published Date Descending Ascending     1-10 of 15 Reviews about "Instruction Set Design (C.0...)": Date Reviewed   LZW-based code compression for VLIW embedded systems Lin C., Xie Y., Wolf W.  Design, automation and test in Europe (Proceedings of the Conference on Design, Automation and Test in Europe, Paris, France, Feb 16-20, 2004) 76-81, 2004.  Type: Proceedings This is a relevant piece of work in the domain of dynamic code compression and decompression in deeply embedded central processing units. The authors identify the code between two branch/jump targets as a potentially good candidate for... Mar 3 2006   Instruction level redundant number computations for fast data intensive processing in asynchronous processors Lee J., Kim E., Lee D. Journal of Systems Architecture: the EUROMICRO Journal 51(3): 151-164, 2005.  Type: Article This paper is poorly written and poorly edited. The crude sentence structure makes it difficult to read. The material covered is over three years old, and no attempt has been made to confirm the hypotheses with laboratory results. Desp... Oct 19 2005   Guide to RISC processors: for programmers and engineers Dandamudi S., Springer-Verlag New York, Inc., Secaucus, NJ, 2005. 387 pp.  Type: Book (9780387210179) An elementary introduction to reduced instruction set computing (RISC) processors, with an overall emphasis on the machine-level language and not on functional chip design, is presented in this book. It is split into three sections: a ... Sep 22 2005   Solutions Relating Static and Dynamic Machine Code Measurements Davidson J., Rabung J., Whalley D. IEEE Transactions on Computers 41(4): 444-454, 1992.  Type: Article The authors give a well-written account of a new perspective on the traditional problem of understanding the nature and behavior of instruction sets. They advance the thesis that static and dynamic frequency counts of instructions are ... Mar 1 1994   Alpha architecture (videotape) Sites D., Meyer D., University Video Communications, Stanford, CA, 1992.  Type: Book (9781555582029) In 1968, Digital Equipment Corporation’s PDP-11 established the norm for 16-bit minicomputers. A decade later, its VAX did the same for 32-bit minis. Digital hopes for a repeat success with Alpha in the 64-bit RISC world. Sin... Dec 1 1993   PA-RISC design issues (videotape) Mahon M., University Video Communications, Stanford, CA, 1992.  Type: Book RISC architectures are subtler than just simplifying the set of instructions and expanding the object program image length, as this videotaped lecture makes clear. Mahon is one of the architects of the PA-RISC system of chips. While ... Jul 1 1993   RISC/CISC development and test support Hobbs M., Prentice-Hall, Inc., Upper Saddle River, NJ, 1992.  Type: Book (9780133884142) The design, development, and testing of microprocessors are practiced by a select group of professionals. The tools of their trade are presumably quite specialized. If a book is to cover these tools and techniques, it needs to be more ... Nov 1 1992   The Evolution of Instruction Sequencing Krick R., Dollas A. Computer 24(4): 5-15, 1991.  Type: Article Eight sections, two sidebars, one cartoon, and a glossary of terms make up this paper. In addition, it has one figure and one table. The sections are “Memory Bandwidth,” “Instruction Buffers,” &a... Jul 1 1992   High performance RISC systems Tabak D. Microprocessors & Microsystems 13(6): 355-372, 1989.  Type: Article This review paper surveys a group of modern microprocessors loosely affiliated under the acronym “RISC.” In a 17-page survey, some small space should have been devoted to a definition of RISC beyond decoding the acr... Jun 1 1990   General addressing mechanisms for microprocessors Steven G., Williams F. Microprocessors & Microsystems 12(2): 67-75, 1988.  Type: Article This paper brings an interesting question about the addressing modes of current microprocessors to our attention. For those of us concerned with assembly language programming or compiler writing this is often a painful subject, as most... Apr 1 1989       Display 510152550100 per page
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