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Accelerator architectures
Patel S., Hwu W. IEEE Micro28 (4):4-12,2008.Type:Article
Date Reviewed: Jan 19 2009

An accelerator architecture is projected as a separate architecture than a base architecture, achieving advantages of performance, cost, or power. This introductory paper--by the guest editors of a special issue of IEEE Micro on accelerator architectures--provides an overview of the topic. The paper then flows to application domains, where these architectures are typically used. It presents the view that, for application domains, “too much performance is never enough,” making them major candidates for accelerators. It stresses that application development efforts are also a big consideration. The paper presents a survey of major accelerator projects from industry, and ends with a small discussion on general-purpose accelerators and the works presented in the issue. The paper can be easily understood by readers from any computer-related field.

Reviewer:  Maulik A. Dave Review #: CR136430 (0910-0925)
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General (C.1.0 )
 
 
Performance Analysis And Design Aids (B.8.2 )
 
 
Performance of Systems (C.4 )
 
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