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Reducing branch predictor leakage energy by exploiting loops
Zhang W., Allu B. ACM Transactions on Embedded Computing Systems6 (2):11-es,2007.Type:Article
Date Reviewed: Aug 16 2007

Energy efficiency is an ongoing goal in computer system design. This paper proposes compiler-directed techniques to mark those branches that are inside of a loop body, putting the prediction table entries for the other branches in an energy-saving mode during the loop execution, and thus reducing the leakage energy of branch predictors while maintaining accuracy and performance. These techniques work on both innermost and outermost loops, and require some hardware support to turn the mechanism on or off. Very long instruction word (VLIW) is the target architecture.

This is a simple and well-defined idea to control partial energy consumption. The proposed approach is well explained, and it is clear where the benefits can be extracted. However, the experiments were carried out on a prediction table with fixed size, restricting the importance of the results once the advantages of the proposal are directly proportional to that size. Also, the results are shown only in terms of dead time, instead of energy reduction or instructions per cycle, making it impossible to see the practical advantages or the real impact on performance. An unfavorable aspect is that the approach requires the recompilation of current applications to include special on/off instructions. In any case, energy usually wasted can be retrieved through this approach.

Reviewer:  Ronaldo A. L. Goncalves Review #: CR134655 (0807-0674)
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Adaptable Architectures (C.1.3 ... )
 
 
Performance of Systems (C.4 )
 
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