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Properties of wired logic
Kambayashi Y. (ed), Muroga S. IEEE Transactions on Computers35 (6):550-563,1986.Type:Article
Date Reviewed: Jan 1 1987

The usage of wired logic reduces the network cost and possibly improves the speed due to shorter delays on wired logic than on a gate. In this paper, the authors discuss some properties of networks with nor gates and wired-and (or wired-or) gates. Some of these properties are used in developing synthesis procedures of optimum networks by the integer programming logic design method. Since very few papers were published on designing networks with wired logic, this paper should be of interest to logic designers.

Reviewer:  Abraham Kandel Review #: CR110928
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Gate Arrays (B.7.1 ... )
 
 
Combinational Logic (B.6.1 ... )
 
 
Logic Arrays (B.6.1 ... )
 
 
Network Problems (G.2.2 ... )
 
 
Miscellaneous (B.7.m )
 
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