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Superscalar RISC concepts and design of the IBM RISC System/6000 (videotape)
Hester P., University Video Communications, Stanford, CA, 1991. Type: Book
Date Reviewed: Apr 1 1993

In this videotaped lecture, Hester presents an overview of the design process that led to the IBM RISC System/6000. In IBM parlance, RISC stands for reduced instruction set cycles, which highlights IBM’s goal of maximizing application performance, as opposed to focusing on a specific architectural model. The videotape describes the design process used to develop the system, techniques used to fabricate the final silicon design, and methodologies used to verify and test the design and to characterize the actual performance of the system. For those wanting to explore the material in greater depth, a limited number of references to the literature are included at the end of the tape.

The publisher should consider including printed copies of the speaker’s overhead slides, which would significantly reduce the need for note-taking. In addition, the audio quality of this particular videotape is inconsistent and choppy, although I hope this is an isolated instance due to the multiple handlings of the tape associated with the review process.

This lecture is part of a series that allows individuals in academic and industrial settings to learn of recent research developments directly from industry leaders. In these brief lectures (about 50 minutes, which fits nicely in the average university class period), the viewer should only expect to obtain a practical orientation to the topic. Since one could easily obtain much of the same information from a journal paper, the real advantage of viewing a videotaped lecture is the opportunity to hear about a new development directly from a person involved in the process, thereby making the learning process a little more interesting and, perhaps, a little more human.

Reviewer:  W. T. Neumann Review #: CR116260
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Ibm Rs/ 6000 (C.5.3 ... )
 
 
Benchmarks (K.6.2 ... )
 
 
Instruction Set Design (C.0 ... )
 
 
Miscellaneous (C.1.m )
 
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Other reviews under "Ibm Rs/6000": Date
RISC System/6000 processor architecture
Groves R., Oehler R. Microprocessors & Microsystems 14(6): 357-366, 1990. Type: Article
Aug 1 1991
IBM RISC System/6000 (3rd ed.)
Hoskins J., John Wiley & Sons, Inc., New York, NY, 1993. Type: Book (9780471580614)
Feb 1 1994

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