Computing Reviews
Today's Issue Hot Topics Search Browse Recommended My Account Log In
Review Help
Search
Energy-aware scheduling on multiprocessor platforms
Li D., Wu J., Springer Publishing Company, Incorporated, New York, NY, 2012. 66 pp. Type: Book (978-1-461452-23-2)
Date Reviewed: Jan 29 2013

Dynamic voltage frequency scaling (DVFS), as explained in this book, allows processors to dynamically adjust supply voltage or clock frequency to operate on different energy levels. This is considered an effective way to save energy. Scheduling is a well-known nondeterministic polynomial-time (NP)-hard problem, and this short book surveys current research on scheduling heuristics for energy-aware multiprocessor platforms. It is first and foremost a scheduling survey, where different levels of power consumption are being considered as another constraint on the optimization process. The problem, then, is either defined as minimizing energy consumption to execute the tasks at hand by some deadline or, conversely, to maximize throughput within a certain power consumption threshold.

The book has six chapters. After a brief introduction, chapter 2 formalizes the main concepts used throughout the book, particularly tasks and platform models. It also defines all the possible scheduling events considered by the model, such as slack reclamation, task migration, and so on.

Chapter 3 presents a collection of proposed scheduling heuristics for homogeneous DVFS multiprocessor platforms, classified by task type. Chapter 4 covers heuristics for heterogeneous platforms. Chapters 3 and 4 do not provide any analysis or comparisons of the many heuristics described, which would have produced a more complete approach.

Chapter 5 surveys related work and comments on other surveys on energy-aware scheduling. Chapter 6 concludes the book with a discussion on future work.

Unfortunately, the book did not receive a thorough editorial review. There is no cohesion of style and the nomenclature varies from section to section. The standards shown in Table 2.1 (“Notations Used in This Book”) are not always followed. For example, processors are sometimes referred to as μ, and sometimes as π, and tasks, although mostly τ, are sometimes tk. The abstract to chapter 4 is an out-of-control list of references spelled out in full form, even though they are referred to appropriately later in the chapter.

Reviewer:  Veronica Lagrange Review #: CR140881 (1305-0336)
Bookmark and Share
  Featured Reviewer  
 
Parallel Architectures (C.1.4 )
 
 
Sequencing And Scheduling (F.2.2 ... )
 
 
Performance of Systems (C.4 )
 
Would you recommend this review?
yes
no
Other reviews under "Parallel Architectures": Date
A chaotic asynchronous algorithm for computing the fixed point of a nonnegative matrix of unit spectral radius
Lubachevsky B., Mitra D. Journal of the ACM 33(1): 130-150, 1986. Type: Article
Jun 1 1986
iWarp
Gross T., O’Hallaron D., MIT Press, Cambridge, MA, 1998. Type: Book (9780262071833)
Nov 1 1998
Industrial strength parallel computing
Koniges A. Morgan Kaufmann Publishers Inc., San Francisco, CA,2000. Type: Divisible Book
Mar 1 2000
more...

E-Mail This Printer-Friendly
Send Your Comments
Contact Us
Reproduction in whole or in part without permission is prohibited.   Copyright 1999-2024 ThinkLoud®
Terms of Use
| Privacy Policy