As random number generators (RNGs) are widely used in Monte Carlo methods and signal processing, high-performance RNGs have been extensively researched, both as algorithms and hardware architectures. Hardware-wise, the performance and frequency of single central processing units (CPUs) is increasing, but power limitations, the memory wall, and other difficulties exist. At the same time, new architectures, such as field-programmable gate arrays (FPGAs), graphics processing units (GPUs), and multicore processors, are adopted for high-performance applications.

This paper identifies “the most appropriate RNG for generating the uniform, Gaussian, and exponential distribution, taking into account the characteristics and architecture of each device.” Because of their embarrassing parallelism, RNG algorithms are ideal candidates for these architectures. The authors show that because of the intrinsic fine-grained parallelism and reconfigurability, FPGA achieves, impressively, 30 times the performance and 175 times the power efficiency of traditional CPUs.

However, it should be noted that RNGs are very rarely implemented alone. When embedded in a system, the overall performance is determined by other factors as well, such as performance of other algorithms and communication overheads. The results of this paper provide useful information for considering RNG algorithms on different platforms and choosing suitable platforms for systems that include RNGs.