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Fault-Containment in Cache Memories for TMR Redundant Processor Systems
Chen C., Somani A. IEEE Transactions on Computers48 (4):386-397,1999.Type:Article
Date Reviewed: Jun 1 1999

The authors present an effective design for real-time detection andrecovery in fault-tolerant computing systems in order to improve systemreliability. To reduce degradation of system performance andreliability, they propose a real-time recovery scheme that provideseffective fault containment for data errors in cache memories. Thescheme is simple to implement and is tailored for TMR redundantprocessor systems using hardware voters. A broadcasting protocol hasbeen developed for real-time restorations of erroneous cache data forredundant TMR processor systems using hardware voting. Its performanceoverhead is to broadcast only 2 to 3 percent of the total memory. Thisconcise paper presents a low-cost and effective real-time errordetection and recovery mechanism. I strongly recommend it tosoftware engineers involved in highly reliable real-timeapplications.

Reviewer:  Florin Popentiu-Vladicescu Review #: CR127303 (99060429)
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Reliability, Testing, And Fault-Tolerance (B.8.1 )
 
 
Cache Memories (B.3.2 ... )
 
 
Reliability, Availability, And Serviceability (C.4 ... )
 
 
Design Styles (B.3.2 )
 
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