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Reviews about "Performance Analysis And Design Aids (B.3.3)":
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A study of pointer-chasing performance on shared-memory processor-FPGA systems Weisz G., Melber J., Wang Y., Fleming K., Nurvitadhi E., Hoe J. FPGA 2016 (Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, Feb 21-23, 2016) 264-273, 2016. Type: Proceedings
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Optimizing data placement on GPU memory: a portable approach Chen G., Shen X., Wu B., Li D. IEEE Transactions on Computers 66(3): 473-487, 2017. Type: Article
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Dynamic core allocation and packet scheduling in multicore network processors Iqbal M., Holt J., Ryoo J., de Veciana G., John L. IEEE Transactions on Computers 65(12): 3646-3660, 2016. Type: Article
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Flash as cache extension for online transactional workloads Kang W., Lee S., Moon B. The VLDB Journal: The International Journal on Very Large Data Bases 25(5): 673-694, 2016. Type: Article
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Architecting phase change memory as a scalable DRAM alternative Lee B., Ipek E., Mutlu O., Burger D. ACM SIGARCH Computer Architecture News 37(3): 2-13, 2009. Type: Article
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Accounting for Memory Bank Contention and Delay in High-Bandwidth Multiprocessors Blelloch G., Gibbons P., Matias Y., Zagha M. IEEE Transactions on Parallel and Distributed Systems 8(9): 943-958, 1997. Type: Article
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Trace-driven memory simulation: a survey Uhlig R., Mudge T. ACM Computing Surveys 29(2): 128-170, 1997. Type: Article
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