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Vaidyan, M
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An FPGA-based parallel architecture for on-line parameter estimation using the RLS identification algorithm
Ananthan T., Vaidyan M. Microprocessors & Microsystems 38(5): 496-508, 2014. Type: Article
The focus of this paper is the optimization and implementation of a recursive least squares (RLS) algorithm for online parameter estimation in systems. The main thrust deals with optimizations to make the algorithm more amenable for im...
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May 19 2015
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