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Compiler techniques for efficient communications in circuit switched networks for multiprocessor systems
Shao S., Jones A., Melhem R. IEEE Transactions on Parallel and Distributed Systems20 (3):331-345,2009.Type:Article
Date Reviewed: Sep 29 2009

This dense paper belongs to the same lineage as several other papers I’ve reviewed for Computing Reviews: a compiling problem combining software specificities with hardware ones is presented; an experimental solution is constructed within the Stanford University Intermediate Format (SUIF) compiler framework, which seems to be an inexhaustible source of such experiments; the actual system is simulated; and the solution is tested with specific benchmarks, with the possible drawback of optimizing the whole system only for a handful of well-known programs.

In this paper, the software goal is to achieve efficient communication in a multiprocessor system, and the hardware goal is to use only circuit switching--with the large overhead for circuit establishment that this implies--instead of packet switching, which does not have this drawback, but costs more. In order to be at least as efficient as packet switching--in fact, more efficient by a nonnegligible factor--it is important to explore the communication patterns of the parallel application and to use the localities that can be discovered.

The authors’ proposed solution would discover these communication patterns in the structure of the application code, during the compilation phase. System calls are generated to a runtime system that manages circuit-switched interconnections.

The bulk of the paper is devoted to presenting the compilation framework and the implementation of an experimental compiler. Control and data-flow analysis is used for discovering the communication patterns. So-called P-matrices are used for presenting these patterns. Here, regrettably, a specific notation that uses chain links appears in some of the matrices, without any explanation.

In order to analyze the performance of the solution, the authors build a multiprocessor system simulator, with which they conduct successive tests with several different benchmarks, progressively increasing the number of networks. Thanks to the analysis performed during compiling, they are able to compare a system that uses only fast packet switching to a system with circuit switching and as many preloaded connections as possible.

The results show that when the correct number of networks is attained (depending on the benchmark), the communication performance is better for circuit switching than for packet switching by a factor of 37 to more than 60 percent. This results from the fact that all of the benchmarks contain a dominant part with a static communication pattern, discovered at compile time. It remains to be proved whether this is true in other multiprocessor system applications. The paper ends with a large bibliography.

Reviewer:  O. Lecarme Review #: CR137329 (1004-0379)
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