Efficient finite field arithmetic is important in a number of applications, including error correcting and cryptography. The most time-consuming finite field operation is multiplication, and, for this reason, it has received a considerable amount of attention in recent years.

In this paper, the authors consider a bit-parallel systolic multiplier over fields of characteristic 2 that was proposed by Fenn et al. [1], and argue that this multiplier does not support concurrent error detection. Using Fenn’s design and a parity prediction scheme, they present a bit-parallel systolic multiplier that can concurrently detect single stuck-at faults online.

The paper contains a number of typographical errors, including multiple incorrect references to the paper by Fenn et al.