The authors propose implementation of the Rivest-Shamir-Adelman (RSA) public key cryptosystem using multiple digital signal processing (DSP) chips. They achieve a speed-up factor of 70 compared with a C software implementation on a PC.
The use of multiple DSP chips (three in the authors’ example) is hard to justify, in light of other known results. For example, Dusse and Kaliski reported a 25–50 millisecond decryption of 512-bit RSA with a single DSP chip [1]. My C implementation on a SPARC station runs in 2 seconds, about the same factor claimed by the authors.
The design suffers from some other problems as well. One problem is the key size (160 bits). This is too small (even 512 bits is not enough for some applications). Another problem is that in this design the secret key is chosen first, and the corresponding public key is calculated accordingly. In most cases, the other way around is preferable, since it is advantageous to have short secret keys. A third problem is that any Carmichael number will pass the proposed primality test (Carmichael numbers are not primes). Better methods exist.
The paper is intended for electrical engineers with little or no background in cryptology. The length of the paper is suitable, the drawings are clear, and the physical form of the material is suitable. A reference to Dusse and Kaliski [1] is missing. I believe that the authors did not know about that work, and would have reconsidered the project if they had. Overall, this paper is a fair description of a graduate-level project, but the quality of the design leaves something to be desired.