Specialists in computer hardware design will profit most from reading this PhD thesis. Some parts of it will also be interesting for beginners who want to learn how current and future reliable electronic devices are constructed and analyzed. The addressed problem is very up to date: as the traditional electronic devices mainly based on silicon complementary metal oxide semiconductor (CMOS) technology reach their performance limits, new paradigms to build computers must be found. However, the newer the technology, the more prone to failures it is. The main concern of this thesis is the fault tolerance of devices and computers based on the new paradigms.

The work is composed of 11 chapters and two appendices. The structure is that of a traditional scientific academic thesis, and includes an introduction (chapter 1), a background presentation (chapter 2), a sketch of research goals to be achieved by the author (chapter 3), a methodology characterization and modeling tools (chapters 4 and 5), and conclusions at the end of the work (chapter 11). The main part of the work consists of chapters focused on these five topics: a mathematical model enabling fault-tolerant behavior analysis of von Neumann multiplexing circuits that are crucial elements of modern computer hardware (chapter 6); a proposal of a reliable processor architecture based on new hardware techniques (chapter 7); an analysis and proposal of a cache memory supporting such a high-level architecture (chapter 8); fault tolerance and cost models of a reliable processor architecture (chapter 9); and a proposal of the implementation of hardware structures on one of the new technologies--quantum dot cellular automata (chapter 10).

When the author proposes new solutions, simulations are carried out to prove that the presented concepts are valid. The information necessary to understand the thesis is included either in chapters 1 through 5 or in the appendices. The first appendix is focused on the presentation of basic modern computer hardware building blocks, that is, programmable logic devices and the idea of reconfigurable computing. The second appendix details how ideas more general than those treated in the thesis (for example, reliable computing) can come to life on the basis of the new building paradigms.

The presentation is very formal, in the way that doctoral theses typically are. However, the style will not be disturbing for those with a strong interest in the topics of chapters 6 through 10. A good survey of the new hardware technologies and reliability problems related to them will also be appreciated by specialists working in this area. Although the work can be used by a layman as an introduction to hardware fault tolerance, using this work as a textbook would require much effort.