| |
Modeling and evaluating heterogeneous memory architectures by trace-driven simulation
Wang W., Wang Q., Wei W., Liu D. Memory access on future processors (Proceedings of the 2008 Workshop on Memory Access on Future Processors, Ischia, Italy, May 5-7, 2008) 369-376, 2008. Type: Proceedings
Much effort is devoted to improving the memory performance of processors, which have an obvious performance bottleneck in their memory systems....
|
Sep 11 2008 |
