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1-10 of 10 Reviews about "
Hardware Description Languages (B.6.3...)
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Date Reviewed
Aspect-oriented RTL HW design using SystemC
Mück T., Fröhlich A. Microprocessors & Microsystems 38(2): 113-123, 2014. Type: Article
In object-oriented programming (OOP), software systems are implemented by decomposing a problem into suitable classes. But some concerns of the system, like synchronization and logging, may not fit well in a modular representation. Asp...
Apr 27 2015
Parallel controller design and synthesis
Jurikovič M., Čičák P., Jelemenská K. FPGAworld 2010 (Proceedings of the 7th FPGAworld Conference, Copenhagen, Denmark, Sep 6, 2010) 35-40, 2010. Type: Proceedings
A synchronous interpreted Petri net (SIPN) is a place-transition net extension used for controller design that copes with both Mealy and Moore type machines. It accepts the definition of logic expressions, supports the utilization of e...
Jul 28 2011
PINAPA: an extraction tool for SystemC descriptions of systems-on-a-chip
Moy M., Maraninchi F., Maillet-Contoz L. Embedded software (Proceedings of the 5th ACM International Conference on Embedded Software, Jersey City, NJ, USA, Sep 18-22, 2005) 317-324, 2005. Type: Proceedings
Static information extracted from SystemC models using PINAPA can be used to aid system-level synthesis, construct graphical depictions, automatically generate documentation, or connect to formal verification tools. The authors claim t...
Nov 29 2005
Verilog HDL
Palnitkar S., Prentice-Hall, Inc., Upper Saddle River, NJ, 1996. Type: Book (9780134516752)
Palnitkar lists four potential audiences for this how-to guide to the Verilog hardware description language (HDL): college students in logic design courses; new Verilog users working in the industry; users with a basic knowledge of Ver...
Apr 1 1997
HIDEL
Ancona M., de Floriana L., Clematis A., Puppo E. The Computer Journal 34(3): 195-206, 1991. Type: Article
HIDEL is one more language that includes all the features necessary for modeling the structure of VLSI objects. It can describe structure (in terms of components and connections) and allows description at various levels of refinement. ...
Oct 1 1992
Concurrent Logic Programming as a Hardware Description Tool
Dotan Y., Arazi B. IEEE Transactions on Computers 39(1): 72-88, 1990. Type: Article
This comprehensive study of the applicability of logic programming languages to hardware description focuses on Flat Concurrent Prolog (FCP), an offspring of Shapiro’s Concurrent Prolog. The authors show that FCP satisfies th...
Apr 1 1991
On the implementation of the CELLAS 2.1 system
Almási J., Kovács I., Medvey M., Simon E., Szëkely Z. Parallel processing by cellular automata and arrays (, Berlin, E. Germany, 891987. Type: Proceedings
The paper reports on the CELLAS 2.1 system, whose main goal is the functional simulation of cellular processors. CELLAS 2.1 is a successor to the original CELLAS, a general-purpose cellular programming language proposed by T. Legendi. ...
Nov 1 1988
IDL: sharing intermediate representations
Lamb D. ACM Transactions on Programming Languages and Systems 9(3): 297-318, 1987. Type: Article
According to the author “the thesis of this paper is that IDL (interface description language) is a practical and useful tool for controlling the exchange of structured data between different components of a large system.&...
Jun 1 1988
Design aids for highly distributed hardware
Rammig F. Concurrent languages in distributed systems: hardware supported implementation (, Bristol, UK, 1491985. Type: Proceedings
This paper presents a hardware description language which has been developed to describe concurrently operating distributed systems. The paper concentrates on the language features for describing concurrent algorithms and system-level ...
Aug 1 1986
FLEX: a high-level language for specifying customized microprocessors
Comer D., Gehani N. (ed) IEEE Transactions on Software Engineering SE-11(4): 387-396, 1985. Type: Article
This paper describes a high-level language, FLEX, for specifying customized microprocessors. FLEX in an outgrowth of the silicon computer PLEX developed by Bell Labs to generate VLSI layouts of high-performance and area-efficient micr...
Jun 1 1986
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