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	Kolodny, Avinoam     Options: All Media Types Journals Proceedings Div Books Whole Books Other Date Reviewed Title Author Publisher Published Date Descending Ascending Date Reviewed     1 - 4 of 4 reviews       The era of many-modules SoC: revisiting the NoC mapping problem Walter I., Cidon I., Kolodny A., Sigalov D.  NoCArc 2009 (Proceedings of the 2nd International Workshop on Network on Chip Architectures, New York, NY, Dec 12, 2009) 43-48, 2009.  Type: Proceedings Thanks to the steep enhancement of integrated chip (IC) resources, more and more function units can be accommodated on a single chip--for example, central processing units (CPUs), application-specific accelerators, general cop...... Feb 26 2010      Utilizing shared data in chip multiprocessors with the Nahalal architecture Guz Z., Keidar I., Kolodny A., Weiser U.  SPAA 2008 (Proceedings of the 20th Annual Symposium on Parallelism in Algorithms and Architectures, Munich, Germany, Jun 14-16, 2008) 1-10, 2008.  Type: Proceedings In a multicore processor chip, the L2 cache may be organized as one private L2 cache per core or a single shared L2 cache. The private cache approach requires smaller caches than a shared cache, and thus has faster cache access time th...... Dec 23 2008     Timing optimization in logic with interconnect Morgenshtein A., Friedman E., Ginosar R., Kolodny A.  System level interconnect prediction (Proceedings of the Tenth International Workshop on System Level Interconnect Prediction, Newcastle, United Kingdom, Apr 5-8, 2008) 19-26, 2008.  Type: Proceedings The general timing optimization problem can be defined as reducing the delay of a logic path propagating over a distance between two points, while performing a logical function. This paper discusses the timing optimization in logic pat...... Jun 11 2008     Interconnect-power dissipation in a microprocessor Magen N., Kolodny A., Weiser U., Shamir N.  System level interconnect prediction (Proceedings of the 2004 international workshop, Paris, France, Feb 14-15, 2004) 7-13, 2004.  Type: Proceedings This paper discusses the important issue of power dissipation in the design of high-performance microprocessors. Its major focus is on dynamic power consumption due to the switching of capacitors, and on the role of the interconnect po...... May 7 2004
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