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Browse All Reviews > Hardware (B) > Arithmetic And Logic Structures (B.2) > Design Styles (B.2.1)
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1-8 of 8
Reviews about "Design Styles (B.2.1)":
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Introduction to logic circuits & logic design with Verilog
LaMeres B., Springer International Publishing, New York, NY, 2017. 459 pp. Type: Book (978-3-319538-82-2)
This book begins with an introduction to the analog versus digital question, and then describes the advantages of today’s popular digital systems. Like any other digital system book, it starts with a description of the number...
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Jul 23 2018 |
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A truly two-dimensional systolic array FPGA implementation of QR decomposition
Wang X., Leeser M. ACM Transactions on Embedded Computing Systems 9(1): 1-17, 2009. Type: Article
Wang and Leeser describe in this paper a straightforward implementation of a QR decomposition (QRD) processor, based on Givens rotations. This specialized processor is a two-dimensional (2D) triangular semi-systolic array....
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Dec 31 2009 |
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GigaOp DSP on FPGA
Hutchings B., Nelson B. Journal of VLSI Signal Processing Systems 36(1): 41-55, 2004. Type: Article
Via two digital signal processing (DSP) applications, Hutchings and Nelson illustrate how tailoring algorithms to fit a field-programmable gate array (FPGA) system can increase performance by an order of magnitude, or higher, relative ...
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Sep 7 2004 |
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Split-Path Enhanced Pipeline Scheduling
Shim S., Moon S. IEEE Transactions on Parallel and Distributed Systems 14(5): 447-462, 2003. Type: Article
Software pipelining is a technique used by modern compilers to generate high performance code for modern processors. This technique increases instruction-level parallelism in the generated code. The paper describes a new method for sof...
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Dec 1 2003 |
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Efficient Exponentiation of a Primitive Root in GF(2m)
Wu H., Hasar M. IEEE Transactions on Computers 46(2): 162-172, 1997. Type: Article
Wu and Hasar discuss the exponentiation of a root in GF(2m). The Galois field representation is useful in cryptography, so this work has immediate applications in network messaging. Public key encryption a...
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Jun 1 1998 |
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Efficient Algorithms for Reconfiguration in VLSI/WSI Arrays
Roychowdhury V., Bruck J., Kailath T. IEEE Transactions on Computers 39(4): 480-489, 1990. Type: Article
In this research paper, the authors derive new algorithms for reconfiguring interprocessor connections in a rectangular array of processors when some of the processors in the array are faulty. The idea is to reconfigure the connections...
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Mar 1 1991 |
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Retrofitting the VAX-11/780 microarchitecture for IEEE floating point arithmetic--implementation issues, measurements, and analysis
Aspinwall D., Patt Y. IEEE Transactions on Computers 34(9): 692-708, 1985. Type: Article
One of the main advantages of implementing a machine architecture by microcode is that it makes it possible to modify the architecture later. The authors report on an actual project that adapted the VAX-11/780 to the new IEEE floating ...
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Aug 1 1986 |
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Efficient implementations of the Chinese remainder theorem for sign detection and residue decoding
Vu T. IEEE Transactions on Computers 34(7): 646-651, 1985. Type: Article
Techniques and a logical diagram for the implementation of the Chinese remaider theorem are described. The author claims that his version of modular arithmetic, which involves fractional representation, will be faster than, for example...
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Jan 1 1986 |
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