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1 - 6 of 6
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Accelerating irregular computation in massive short reads mapping on FPGA co-processor
Tan G., Zhang C., Tang W., Zhang P., Sun N. IEEE Transactions on Parallel and Distributed Systems 27(5): 1253-1264, 2016. Type: Article
Next-generation sequencing (NGS) is a big data problem. On the one hand, it is embarrassingly parallel; on the other hand, the memory accesses are irregular (noncontiguous). This is a unique application category where throwing extra co...
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Oct 4 2016 |
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Combining execution pipelines to improve parallel implementation of HMMER on FPGA
Abbas N., Derrien S., Rajopadhye S., Quinton P., Cornu A., Lavenier D. Microprocessors & Microsystems 39(7): 457-470, 2015. Type: Article
Homology is a process of detecting similarity between two strands of proteins or genes to establish common ancestry. Sequence similarity searching is a computationally intensive process because the protein sequence databases are very c...
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Feb 19 2016 |
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Execution trace-driven energy-reliability optimization for multimedia MPSoCs
Das A., Singh A., Kumar A. ACM Transactions on Reconfigurable Technology and Systems 8(3): 1-19, 2015. Type: Article
Dynamic task scheduling and fault tolerance in multiprocessor systems-on-chip (MPSoCs) are explored in this paper. The paper describes a heterogeneous MPSoC system with a special fault-free node called RTM to manage the other processin...
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Aug 19 2015 |
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Verilog HDL simulator technology: a survey
Tan T., Rosdi B. Journal of Electronic Testing: Theory and Applications 30(3): 255-269, 2014. Type: Article, Reviews: (1 of 2)
Tan et al. discuss the origin of Verilog, as well as its standardization and widespread adoption as one of the most popular hardware description languages (HDLs) for synthesis and behavioral modeling. The paper is well written and easy...
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May 27 2015 |
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 A leap forward with UTK’s Cray XC30
Fahey M. XSEDE 2014 (Proceedings of the 2014 Annual Conference on Extreme Science and Engineering Discovery Environment, Atlanta, GA, Jul 13-18, 2014) 1-8, 2014. Type: Proceedings
This paper presents the advances made in the Cray XC30 supercomputer over the previous generation of supercomputers from Cray. It also describes a number of applications implemented on XC30, which show significant performance advantage...
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Dec 23 2014 |
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RIVER: reconfigurable flow and fabric for real-time signal processing on FPGAs
Brugger C., Hillenbrand D., Balzer M. ACM Transactions on Reconfigurable Technology and Systems 7(3): 1-16, 2014. Type: Article, Reviews: (2 of 2)
The authors of this paper describe an architecture called RIVER and a design flow for field-programmable gate arrays (FPGAs). They have built a precompiled library consisting of many combinations and permutations of basic “bu...
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Dec 11 2014 |
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