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	ACM Transactions on Reconfigurable Technology and Systems Association for Computing Machinery, Inc.         Options: Date Reviewed Title Author Publisher Published Date Descending Order Ascending Order     1-10 of 20 reviews Date Reviewed     Automata processing in reconfigurable architectures: in-the-cloud deployment, cross-platform evaluation, and fast symbol-only reconfiguration Bo C., Dang V., Xie T., Wadden J., Stan M., Skadron K. ACM Transactions on Reconfigurable Technology and Systems 12(2): 1-25, 2019.  Type: Article In this new world of heterogeneous computing, automata processing has seen renewed interest with the advent of new workloads like machine learning, gene sequence matching, and other established disciplines like compiler design. This pa... Oct 18 2019   FeatherNet: an accelerated convolutional neural network design for resource-constrained FPGAs Morcel R., Hajj H., Saghir M., Akkary H., Artail H., Khanna R., Keshavamurthy A. ACM Transactions on Reconfigurable Technology and Systems 12(2): 1-27, 2019.  Type: Article For some time, application-specific integrated circuits (ASICs) have been used to efficiently accelerate computational performance in many areas of technology, including Internet of Things (IoT) devices. ASICs, however, are tailored to... Jul 30 2019   PIMap: a flexible framework for improving LUT-based technology mapping via parallelized iterative optimization Liu G., Zhang Z. ACM Transactions on Reconfigurable Technology and Systems 11(4): 1-23, 2019.  Type: Article Transforming gate-level Boolean logic into functionally equivalent lookup tables (LUTs) is a key step in the compilation of a design into field-programmable gate arrays (FPGAs). Tools typically deploy a sequence of logic optimizations,... Apr 3 2019   Network on chip architecture for multi-agent systems in FPGA Gerlein E., Mcginnity T., Belatreche A., Coleman S. ACM Transactions on Reconfigurable Technology and Systems 10(4): 1-22, 2017.  Type: Article Hardware agent architecture is based on event-driven reactive architecture. In this architecture, each agent has defined tasks and these tasks interact using events. Events can be used to pass data and control information. In this pape... Apr 17 2018   Reducing the performance gap between soft scalar CPUs and custom hardware with TILT Tili I., Ovtcharov K., Steffan J. ACM Transactions on Reconfigurable Technology and Systems 10(3): 1-23, 2017.  Type: Article This paper is an extension of a seminal presentation of thread- and instruction-level parallel template architecture (TILT). TILT is a software-programmable custom computing engine that utilizes both thread- and instruction-level paral... Mar 9 2018   Execution trace-driven energy-reliability optimization for multimedia MPSoCs Das A., Singh A., Kumar A. ACM Transactions on Reconfigurable Technology and Systems 8(3): 1-19, 2015.  Type: Article Dynamic task scheduling and fault tolerance in multiprocessor systems-on-chip (MPSoCs) are explored in this paper. The paper describes a heterogeneous MPSoC system with a special fault-free node called RTM to manage the other processin... Aug 19 2015   RIVER: reconfigurable flow and fabric for real-time signal processing on FPGAs Brugger C., Hillenbrand D., Balzer M. ACM Transactions on Reconfigurable Technology and Systems 7(3): 1-16, 2014.  Type: Article, Reviews: (2 of 2) The authors of this paper describe an architecture called RIVER and a design flow for field-programmable gate arrays (FPGAs). They have built a precompiled library consisting of many combinations and permutations of basic “bu... Dec 11 2014   RIVER: reconfigurable flow and fabric for real-time signal processing on FPGAs Brugger C., Hillenbrand D., Balzer M. ACM Transactions on Reconfigurable Technology and Systems 7(3): 1-16, 2014.  Type: Article, Reviews: (1 of 2) Field-programmable gate arrays (FPGAs) have become the most effective, powerful, and generic logic design and verification tools during the last decade. Specialized hardware implementations for building high-performance parallel proces... Oct 14 2014   Fast design exploration for performance, power and accuracy tradeoffs in FPGA-based accelerators Ulusel O., Nepal K., Bahar R., Reda S. ACM Transactions on Reconfigurable Technology and Systems 7(1): 1-22, 2014.  Type: Article Design space exploration is a critical development stage for hardware design. With the growing complexity of applications and the corresponding hardware we design to accelerate them, the task of exploring the wide variety of potential ... Jun 3 2014   Dynamic power and thermal management of NoC-based heterogeneous MPSoCs Kornaros G., Pnevmatikatos D. ACM Transactions on Reconfigurable Technology and Systems 7(1): 1-26, 2014.  Type: Article With increasing transistor counts, multiprocessor systems-on-chip (MPSoCs) provide system and application builders flexibility to deliver solutions that provide good performance while keeping overall system power and temperature under ... May 19 2014       Display 510152550100 per column
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