Search for Author All Reviews
	Shires, Dale R.     Options: All Media Types Journals Proceedings Div Books Whole Books Other Date Reviewed Title Author Publisher Published Date Descending Ascending Date Reviewed     1 - 2 of 2 reviews       Parallel programming model for the Epiphany many-core coprocessor using threaded MPI Ross J., Richie D., Park S., Shires D. Microprocessors & Microsystems 43(C): 95-103, 2016.  Type: Article This particular parallel programming model using threaded message passing interface (MPI) was implemented on a special architecture, the Adapteva Epiphany. The Epiphany IV architecture is comprised of 64 cores arranged in 2D tiled mesh...... Aug 29 2016     Coprocessor computing with FPGA and GPU Park S., Shires D., Henz B.  HPCMP-UGC 2008 (Proceedings of the 2008 DoD HPCMP Users Group Conference, Seattle, WA, Jul 14-17, 2008) 366-370, 2008.  Type: Proceedings Park, Shires, and Henz look at application acceleration comparisons using field programmable gate arrays (FPGAs) and graphics processing units (GPUs). They select two applications and evaluate their performance in terms of execution sp...... Mar 9 2010
	Reproduction in whole or in part without permission is prohibited.   Copyright 1999-2024 ThinkLoud® Terms of Use | Privacy Policy