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Hu, Yu Hen
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Mapping deep nested do-loop DSP algorithms to large scale FPGA array structures
Kittitornkun S., Hu Y. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 11(2): 208-217, 2003. Type: Article
In its first section, this paper introduces the new MODG design methodology for mapping an inner loop body to a configurable, linear array of processing elements (PEs). The body is represented by a loop dependence graph, while the PEs ...
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Jan 13 2004
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