Computing Reviews

Architectural support for data-driven execution
Matheou G., Evripidou P. ACM Transactions on Architecture and Code Optimization11(4):1-25,2015.Type:Article
Date Reviewed: 04/22/15

Although various approaches for data-driven execution exist, the authors focus on data-driven multithreading (DDM), following up on their previous work in that area. This interesting paper deals with the low-level details of building a complete system for data-driven execution. The paper represents an advance in the state of the art for DDM as the authors move from simulation to actual prototyping on a field-programmable gate array (FPGA).

DDM divides the code to be executed at a fine grain into threads. These threads are then scheduled as soon as their input data is available, setting up a producer/consumer relationship between the threads. The approach taken by the authors is to either use manual annotation or a source-to-source compiler supporting higher-level pragmas to extract such threads (termed d-threads) from the program. The final target is a program with DDM-related annotations with mnemonics defined by the authors in the paper. A frequent pattern that occurs in their examples is transforming different independent loop iterations into d-threads. The core contribution of the paper is an entire FPGA prototype that can execute these d-threads by tracking their dependencies and scheduling them when ready on a multicore. At the core of the implementation is the thread-scheduling module. This module uses memory to maintain the startup contexts of threads and their dependencies and finite-state machines (FSMs) to decide when threads become ready to execute, at which point they are dispatched to multicores. The results obtained are impressive with near perfect speedups.

In general, the paper is an interesting read, particularly for an audience that is interested in prototyping novel ideas in computer architecture on FPGAs.

Reviewer:  Amitabha Roy Review #: CR143374 (1507-0586)

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