Computing Reviews
Today's Issue Hot Topics Search Browse Recommended My Account Log In
Review Help
Search
Concurrent programming without locks
Fraser K., Harris T. ACM Transactions on Computer Systems25 (2):5-es,2007.Type:Article
Date Reviewed: May 13 2008

Transactional memory technology reduces the granularity of synchronization from the relatively coarse level of mutual exclusion locks to the finer level of memory access. This comprehensive paper contains valuable insights and working code to assess experimentally the potential of transactional memory.

Synchronized memory access is different from a traditional mutual exclusion lock. The advantage is reduction of contention; the disadvantage is a new model and new mechanisms for concurrent programming. The mutual exclusion model is implemented with mechanisms that serialize access to protected code at the procedural level. The new model is elegantly different and uses a concept similar to that of transactions, applying it to memory access or short collections of access events. When contention arises, it is resolved with the finest possible level of granularity, which offers the potential for extended concurrency with an intrinsic minimum of contention.

This unusually long paper (61 pages) presents three lock-free application programming interfaces (APIs) and their implementations. The code allows for writing concurrent applications synchronized using transactional memory. Fraser and Harris describe in great detail these implementations, which are immediately available for downloading. Source code is configurable for several microprocessor architectures. The code uses whatever primitive synchronization instructions the hardware makes available. Current hardware architecture, however, is inspired by the mutual exclusion model. I wonder what performance may be possible if more suitable hardware support for transactional memory ever becomes available.

Awe-inspiring benchmarks of these implementations are so compelling as to incite a duplication of the presented results. The benchmarks, alas, were run on exotic SPARC hardware with more than 100 central processing units (CPUs). Unfortunately, the code as downloaded generates compilation errors on a more modest SuSE Linux 10.2 i86_64 SMP desktop with GCC 4.2.1 pre-release, or on a SuSE Linux 10.3 32-bit i86 with GCC 4.2.1. Compilation errors, however disappointing, can be tolerated in a prototype.

Transactional memory may not be the universal solution for highly concurrent computing, but the implementations by the authors provide good arguments in its favor.

Reviewer:  A. Squassabia Review #: CR135584 (0904-0364)
Bookmark and Share
  Reviewer Selected
Featured Reviewer
 
 
Concurrency (D.4.1 ... )
 
 
Mutual Exclusion (D.4.1 ... )
 
Would you recommend this review?
yes
no
Other reviews under "Concurrency": Date
Integrated concurrency control in shared B-trees
Lausen G. Information Sciences 52(2): 2000. Type: Article
May 1 1985
Software concurrency in real-time control systems: a software nucleus
Sears K., Middleditch A. Software--Practice & Experience 15(9): 739-759, 1985. Type: Article
Jun 1 1986
Understanding concurrency in Ada
Shumate K. (ed), Intertext Pubs./McGraw-Hill Book Co., New York, NY, 1988. Type: Book (9789780070572997)
May 1 1989
more...

E-Mail This Printer-Friendly
Send Your Comments
Contact Us
Reproduction in whole or in part without permission is prohibited.   Copyright 1999-2024 ThinkLoud®
Terms of Use
| Privacy Policy