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Digital systems: hardware organization and design (3rd ed.)
Hill F., Peterson G. (ed), John Wiley & Sons, Inc., New York, NY, 1987. Type: Book (9789780471808060)
Date Reviewed: Nov 1 1988

It is very difficult to criticize a well-known text that has served for over 15 years to introduce electrical engineering and computer science students to hardware organization and system architecture. Please remember that this is not a freshly written book, but the third edition of a mature text. What has been the impact of the last nine years of developments in hardware on it?

The book begins with an introduction, followed by three tutorial chapters describing typical CPU architecture, the actual digital hardware realization, and the register transfer level. Thus, the only prerequisite is a prior knowledge of and experience with a contemporary microcomputer, including programming in a high-level language, binary systems, Boolean algebra, and Karnaugh maps. In particular, no electrical engineering background is required, though a rough knowledge of digital circuit design or electronics and switching theory would be useful.

Chapter 5 then describes the famous AHPL language. Certain constructs are developed only in later chapters, and some of them are not even mentioned in the index (including FOR, TRANS, and CONTROLRESET). The language should be summarized, therefore, in a separate appendix using some sort of formal metalanguage notation. I understand that the aim of this book is not to teach AHPL, which is only a vehicle to carry the hardware descriptions. However, AHPL is more important than the RIC (for representative instructional computer) itself; besides, such a reference guide is needed since the HPSIM simulator for AHPL sequences is available.

The RIC is the (theoretical) example computer used in this book. Although 18-bit SIC is changed to 32-bit RIC in the third edition, the emphasis is still on mainframes: the book lacks byte-addressed memory, variable command lengths with many addressing modes, instructions that modify the actual execution of the next instruction (with the associated issue of their interrupt and restart), and support for high-level or extensible programming languages. RIC is described in chapter 6, where almost complete control sequences are developed, and the next chapter completes the explanation of their correspondence to the actual underlying hardware. Chapter 8 is devoted to microprogrammed realization, an issue that neatly matches AHPL control sequences. In spite of being rewritten, it seems too short. Diagnostic microprograms and modern microprogram design aids should be mentioned here.

The next four chapters introduce more complex organization, dealing with the interconnections of a CPU to the external world: asynchronicity problems, intersystem buses and their arbitration, interrupts, interfacing peripherals, and serial communication. They have been rewritten to emphasize memory-mapped I/O and USART and HDLC circuits, but some residue of separate I/O address space could remain, and a timer-counter or even a DES or RSA data encryptor device could be introduced. I would also prefer the usual naming conventions of RS-232 lines to be used, and perhaps asynchronous control units should be mentioned here.

Chapter 13 investigates techniques for speeding up memories: caches, virtual memories, interleaving, and multiporting. The issue of cache coherence due to multiple parallel processors is not discussed here; similarly, capability-based tagged architectures are not even introduced.

The next three chapters present the solutions used in contemporary ALUs for addition, multiplication, division, and floating-point operations. This can be expanded to develop a complete floating-point coprocessor.

The final chapter is an excursion into the world of pipelined and parallel computers. It is so brief that various interconnection networks for them are not even mentioned. Instructions supporting synchronization or task concurrency are also ignored.

There is a two-part appendix that assembles the RIC description. Unfortunately, the AHPL declaration part is omitted here. Also, additional coverage should be devoted to RIC-II, which is a prolonged and almost independent example. The index has some minor omissions.

Each chapter provides exercises and its own list of readings for further study. Only a fifth of these readings are actually referenced in the text. Still, their total number (over 200) is misleading: due to multiple repetitions there are slightly over 100 different books and papers. The presentation is “from specific example to general rule,” and will at times drive a careful reader to the suspicion that the authors are missing some points (for example, filling a pipeline on page 312 is postponed for 24 pages until problem 9.4). Flowcharts are provided in only a few chapters, and very few comments are slipped into AHPL control sequences (no symbolic labels or comments are present in AHPL syntax).

The book was extensively rewritten, and now covers established standards including IEEE 754 and RS-232. But some rewritten chapters were not thoroughly tested, so errors tend to cluster there. There are about 100 typos (in 600 pages), which can be attributed to the publisher, and almost 50 minor flaws that were unquestionably done by the authors. Additionally, two dozen unmatched cross-references result from the revisions. I think that all examples should have captions and a list of them should be given. There are also over 10 severe errors preventing AHPL sequences from being correct and suggesting that they were neither tested nor consolidated as a whole before being published. The use of various fonts is not consistent throughout the book; moreover, italics are not clearly distinguishable from roman letters (even by the editors).

The overall organization of the material, as most of us know from previous editions, fits well into a two-semester course. But there is at least one apparent flaw: the book does not emphasize how small modifications in AHPL descriptions should result in fundamental changes in actual underlying hardware. The issue of circuit complexity and performance analysis is barely touched. Also, timing considerations are not dealt with in depth.

We can still consider this book as an introduction to the process of hardware design; 56 prolonged examples and over 250 updated and expanded exercises should teach a reader how to engineer hardware. It is valuable that not only is the CPU dealt with, but also some fine points of hardware realization are filled in: I/O (including peripheral-initiated communications), parallel activities, and so forth. But the other goal is missed today--this book cannot serve as a descriptive survey of contemporary hardware. I do not mind that it is easy to find in modern micros a plethora of operations not included in RIC: decimal, stack-oriented, string, and bit-field instructions. There are other topics that can also be left as exercises for the students, including “shadow” register sets, the supervisor state, the CPU watchdog, and separate command and data address spaces. No doubt, some examples should be modernized: I think that a printer interface implementing ESC-P steering codes or an intelligent disk controller is preferable to a standard MT transport device (was it at least called a streamer). But there still remain other architecture styles that are worth a book in themselves, including dataflow machines, cellular and systolic arrays, and specialized CPUs and systems. It is not now possible to cover all the hardware in any single book (remember The art of computer programming [1]), so let this book remain frozen as a smart introduction to the world of digital systems.

Reviewer:  J. Klaczak Review #: CR112601
1) Knuth, D. E.The art of computer programming. Vol. 1: fundamental algorithms. Addison-Wesley, Reading, MA, 1968. See <CR> 9, 6 (June 1968), Rev. 14,505 and <CR> 9, 9 (Sept. 1968), Rev. 15,182. Vol. 2: seminumerical algorithms. Addison-Wesley, Reading, MA, 1969. See <CR> 11, 2 (Feb. 1970), Revs. 18,477 and 18,478. Vol. 3: sorting and searching. Addison-Wesley, Reading, MA, 1973. See <CR> 14, 8 (Aug. 1973), Rev. 25,533.
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