This book is essentially two volumes in one. The first five-and-a-half chapters are intended for a “late-sophomore, early-junior year course” in computer architecture for students with a computer science (as opposed to engineering) background. The remaining three-and-a-half chapters are intended as the focus for a “dual-level course designed for a mixture of beginning graduate students and seniors with a grounding in circuits, assemblers, languages, and operating systems.” If there is a hierarchy from “computer systems” to “computer architecture” to “computer organization” to “logic design,” this book would fall somewhere within the top two levels. Despite the subtitle (“Hardware/Software”), coverage of software topics is minimal.

Chapter 1, The Basics, covers data types, direct addressing, and registers. Chapter 2, Instructions and Modalities, deals with operation codes, addressing modes, and instruction sets. Chapter 3, The Control Unit, introduces instruction processing with a discussion of microprogrammings and some examples of CPU organization. Chapter 4, Memories, includes material ranging from cache to virtual memory, such as core and solid-state memory implementations, pseudodisks, and purchase of add-on primary memory, among other topics. Chapter Five, Input/Output, Data Paths, and Interrupts, surveys various I/O systems and includes material on bus structures and types of I/O devices. Chapter 6, The von Neumann SISD Computer, discusses single processor concurrency, IBM, DECC and Intel families of processors, language directed machines, and the Reduced Instruction Set Computer (RISC) concept. Chapter 7 Multiprocessors and Multicomputers: MIMD Systems, uses the IBM/370AP and 308X, the Intel 432, C.mmp, and CM* as its examples. Chapter 8, Special Purpose Systems, covers array and vector processors (FPS, Cray), SIMD machines (Illiac IV, BSP, Staran, and MPP), data driven processors (data flow and reduction), and the database machine concept. Chapter 9, Computer Networks, includes network topologies, the ISO model, channel implementations, and examples including Bisync, SNA, DECNET, and Ethernet.

The material is somewhat expanded and reordered compared to the first edition [- 1]. New material includes descriptions of several I/O devices in Chapter 5 and descriptions of newer processors (VAX, I8086 family, Cray, FPS, Cyber 205, IBM 370AP and 308X) in various places.

The two best features of the book are (1) its wealth of material covered, and (2) its high degree of accuracy in presenting the material. There are exceptions to both of these assets, of course. For example, intermessage processors (IMPs) are mentioned throughout the networking chapter, but ARPANET (to say nothing of CSNET, BITNET, etc.) is never mentioned at all. Workstations, graphics processors, and other “special purpose systems,” such as systolic arrays, the Ultracomputer, the Hypercube, and the Non-Von systems are also conspicuous by their absence. The inaccuracies of which I am aware seem fairly minor. Examples include a garbled description of the use of autoincrement addressing with memory-mapped I/O (p. 222); the suggestion that dynamic memory (DRAM) refreshing is typically an operating system function (p. 198); nonstandard definitions of software process states (p. 239); and a definition of “sequent- ial machines” in terms of instruction addressing (p. 110).

The major problem with the book is poor organization, and this problem exists at numerous levels. Starting with the Table of Contents one sees little rationale evident for the choice of material to be included in the chapters and little evidence of logical development of topics within each chapter. The typographical layout of the headings within the chapters does not always provide structural guides to the reader, and capitalization of terms within the text is inconsistent. Terms are regularly used before being defined, and terminology is inconsistent (p. 213 compares write-through with write-out algorithms, but p. 326 compares write-through with write-back, for example). Bell and Newell’s Processor/Memory/Switch (PMS) notation [2] is introduced early in Chapter 1, then used only infrequently throughout the volume, and finally another (equivalent) notation is introduced in the last chapter for network topologies. Coverage is necessarily shallow for a book which intends to cover so much material in a one-semester course, but the poor organization makes the coverage seem uneven as well. Each chapter ends with some mixture of “problems,” “investigations,” and “projects.” While these exercises are also uneven in quality, there are several excellent ones an instructor could use as models for homework assignments.

The book could be used an an excellent secondary reference by students of the field. The Index is good, and the ten-page Bibliography (which contains references as late as early 1985) is well-referenced within the text.