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1-6 of 6 Reviews about "
Test Generation (B.7.3...)
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Date Reviewed
AVPGEN--a test generator for architecture verification
Chandra A., Iyengar V., Jameson D., Jawalekar R., Nair I., Rosen B., Mullen M., Yoon J., Armoni R., Geist D., Wolfsthal Y. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 3(2): 188-200, 1995. Type: Article
AVPGEN is a system that assists in the creation of tests for the verification of a processor architecture. It consists of a database of processor features; a language, SIGL, in which test templates can be specified; and a supervisor th...
Jan 1 1996
Built-In Testing of Integrated Circuit Wafers
Rangarajan S., Fussell D., Malek M. IEEE Transactions on Computers 39(2): 195-205, 1990. Type: Article
Assume that a wafer contains an array of identical integrated circuits, that a test can be applied to all of these in parallel, and that the test results for each IC can be compared. In the usual case a test is applied and the results ...
Mar 1 1991
Selecting test methodologies for PLAs and random logic modules in VLSI circuits--an expert systems approach
Bhawmik S., Narang V., Chaudhuri P. Integration, the VLSI Journal 7(3): 267-281, 1989. Type: Article
Design for testability (DFT) involves methods of designing circuits and systems to make the creation of tests for manufacturing defects easier. A wide range of DFT techniques exist. Each method involves certain costs in such terms as c...
Aug 1 1990
Design for testability of a 32-bit TRON microprocessor
Nozuyama Y., Nishimura A., Iwamura J. Microprocessors & Microsystems 13(1): 17-27, 1989. Type: Article
Many techniques exist for improving the testability of integrated circuits, and many papers describe them. A paper that describes how some of these techniques are combined in a real integrated circuit, however, is not so common. This p...
Oct 1 1989
LSI/VLSI testability design
Tsui F., McGraw-Hill, Inc., New York, NY, 1987. Type: Book (9789780070653412)
This is not just a book on Design For Testability (DFT); it is a plea for the importance of using DFT in all stages of design. In particular, it advocates In-System At-Speed Testability (ISAST) as the solution to testing and diagnosis ...
Oct 1 1987
Test generation for digital systems
Abraham J., Agarwal V., Prentice-Hall, Inc., Upper Saddle River, NJ, 1986. Type: Book (9789780133082302)
This is a nicely written piece surveying the literature in test generation techniques. The D-algorithm, a classical approach, is covered along with the new random testing and signature analysis techniques. A background in digital syste...
Oct 1 1987
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