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Browse All Reviews > Hardware (B) > Integrated Circuits (B.7) > Design Aids (B.7.2) > Layout (B.7.2...)
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1-8 of 8
Reviews about "Layout (B.7.2...)":
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Printed circuit board designer’s reference
Robertson C., Prentice Hall PTR, Upper Saddle River, NJ, 2003. Type: Book (9780130674814)
Introductory information about printed circuit board (PCB) designs is presented in this book. It is organized into eight chapters. The first chapter introduces basic terminology, along with some structural details of a PCB. Some limita...
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Mar 12 2004 |
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Leaf cell and hierarchical compaction techniques
Bamji C., Varadarajan R., Kluwer Academic Publishers, Norwell, MA, 1997. Type: Book (9780792399469)
Layout compaction has been studied intensively in the last decade. The compaction technique has been applied to leaf cells, macros, wiring channels, and floorplans. Many sophisticated and elegant papers have been published. On the othe...
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Mar 1 1998 |
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An efficient macro-cell placement algorithm
Aarts E., de Bont F., Korst J., Rongen J. Integration, the VLSI Journal 10(3): 299-317, 1991. Type: Article
In VLSI design, macro-cell placement arranges rectangular blocks of arbitrary widths and heights on the chip. The goal is to minimize the chip size and to reduce the total wire length of the nets connecting different blocks. This paper...
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Mar 1 1992 |
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Heuristic algorithms for single row routing
Du D., Hsu Liu L. IEEE Transactions on Computers 36(3): 312-321, 1987. Type: Article
The authors present a heuristic algorithm to solve a subproblem in the routing of connections on a multilayer printed circuit board. The subproblem is the single row case. Given m disjoint subsets of n collinear node poin...
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Aug 1 1988 |
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Layouts with wires of balanced length
Becker B., Osthof H. Information and Computation 73(1): 45-58, 1987. Type: Article
This is a good paper. It shows that theoretical results of computer science are key to our better understanding of practical problems--in this case, the well-known placement and routing problems of VLSI design. T...
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Oct 1 1987 |
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Optimal layer assignment for interconnect
Pinter R. Advances in VLSI and Computer Systems 1(2): 123-137, 1984. Type: Article
This paper deals with the layer assignment problem (i.e., the determination of the layers which are going to be used for wiring the signal nets). The problem is first presented and then a solution for two layers is given using only the...
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Sep 1 1985 |
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Optimal orientations of cells in slicing floorplan designs
Stockmeyer L. Information and Control 57(2-3): 91-101, 1983. Type: Article
A methodology of VLSI layout described by several authors first determines the relative positions of indivisible pieces, called cells, on the chip. Various optimizations are then performed on this initial layout to minimize some cost ...
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Mar 1 1985 |
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One-layer routing without component constraints
Lloyd E., Ravi S. Journal of Computer and System Sciences 28(3): 420-438, 1984. Type: Article
This well-written paper considers the problem of wiring together, in one layer, :In corresponding pairs of terminals that are located in two parallel rows on opposite sides of a channel. The channel width may either be fixed or variab...
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Jan 1 1985 |
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