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	Browse All Reviews > Hardware (B) > Register-Transfer-Level Implementation (B.5) > Design Aids (B.5.2) > Simulation (B.5.2...)     Options: All Media Types Journals Proceedings Div Books Whole Books Other Date Reviewed Title Author Publisher Published Date Descending Ascending     1-1 of 1 Reviews about "Simulation (B.5.2...)": Date Reviewed   Valid Transformations: A New Class of Loop Transformations for High-Level Synthesis and Pipelined Scheduling Applications Rim M., Jain R. IEEE Transactions on Parallel and Distributed Systems 7(4): 399-410, 1996.  Type: Article Rim and Jain present their paper in four sections: “Introduction,” “Valid Transformations,” “Examples,” and “Conclusion.” The introduction provides a lengt... Mar 1 1997
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