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  Browse All Reviews > Hardware (B) > Register-Transfer-Level Implementation (B.5) > General (B.5.0)  
 
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  1-2 of 2 Reviews about "General (B.5.0)": Date Reviewed
  PIMap: a flexible framework for improving LUT-based technology mapping via parallelized iterative optimization
Liu G., Zhang Z. ACM Transactions on Reconfigurable Technology and Systems 11(4): 1-23, 2019.  Type: Article

Transforming gate-level Boolean logic into functionally equivalent lookup tables (LUTs) is a key step in the compilation of a design into field-programmable gate arrays (FPGAs). Tools typically deploy a sequence of logic optimizations,...

Apr 3 2019
  Semi-Logarithmic Number Systems
Muller J., Scherbyna A., Tisserand A. IEEE Transactions on Computers 47(2): 145-151, 1998.  Type: Article

Semi-logarithmic number systems, which are intermediate between the standard floating-point systems and logarithmic systems, are described and analyzed. They are parameterized by an integer, k, which corresponds to t...

Dec 1 1998
 
 
 
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