| |
Reviews about "Multiple Data Stream Architectures (Multiprocessors) (C.1.2)":
|
Date Reviewed |
Algorithm 980: sparse QR factorization on the GPU
Yeralan S., Davis T., Sid-Lakhdar W., Ranka S. ACM Transactions on Mathematical Software 44(2): 1-29, 2017. Type: Article
|
Mar 14 2018 |
Coarray-based load balancing on heterogeneous and many-core architectures
Cardellini V., Fanfarillo A., Filippone S. Parallel Computing 68 45-58, 2017. Type: Article
|
Dec 12 2017 |
Improving loop dependence analysis
Jensen N., Karlsson S. ACM Transactions on Architecture and Code Optimization 14(3): 1-24, 2017. Type: Article
|
Dec 7 2017 |
SoPHy+
Kim T., Kang J., Kim S., Ha S. Microprocessors & Microsystems 43(C): 47-58, 2016. Type: Article
|
Aug 1 2016 |
A MapReduce scratchpad memory for multi-core cloud computing applications
Kachris C., Sirakoulis G., Soudris D. Microprocessors & Microsystems 39(8): 599-608, 2015. Type: Article
|
May 19 2016 |
FPGA-GPU communicating through PCIe
Thoma Y., Dassatti A., Molla D., Petraglio E. Microprocessors & Microsystems 39(7): 565-575, 2015. Type: Article
|
May 18 2016 |
Speculative segmented sum for sparse matrix-vector multiplication on heterogeneous processors
Liu W., Vinter B. Parallel Computing 49(C): 179-193, 2015. Type: Article
|
Apr 21 2016 |
more...
|
|
|
|
