Bi et al. propose a random region covering theory to optimize designs on systems and circuits. The proposed work has been verified on a class-E power amplifier and a cascade local impedance attenuation amplifier. Both are analog circuits with a simple structure. Mathematical benchmarks and practical circuits are tested to evaluate the optimizations. At the end of the paper, the authors also mention the potential applications of this methodology to some other optimization problems such as worst-case analysis, intellectual property (IP) development, and yield enhancement.

From the circuit designers’ perspective, the random region covering method can also be extended in complex system-level design and verification, including self-regulation random test generators, random region covering method test cases, and the coverage-based verification method. These are commonly employed in verification methodologies like the universal verification methodology (UVM)/ virtual machine manager (VMM) of application-specific integrated circuit (ASIC)/field-programmable gate array (FPGA) designs and verification.