With increasing transistor counts, multiprocessor systems-on-chip (MPSoCs) provide system and application builders flexibility to deliver solutions that provide good performance while keeping overall system power and temperature under control. This paper deals with the problem of power and temperature management in complex MPSoCs. The authors focus in particular on the globally asynchronous locally synchronous approach. They deal with an MPSoC design that divides the processor into independent islands, each of which manages its voltage and clock frequency independently. Each island consists of a management core and a number of accelerator cores that are interconnected using message-passing links and synchronized through shared memory on the island. Islands are interconnected with a network-on-chip (NoC) that crosses clock and voltage domains.

The key contribution of the paper is in the development of a field-programmable gate array (FPGA)-based platform to emulate such a system, in conjunction with thermal and power sensors that provide continuous accurate measurements of power and temperature. Some of the evaluation deals with showing that the FPGA-based emulation matches the simulation of such a system in terms of power and temperature for the individual islands while providing orders of magnitude better simulation throughput. This immediately opens the door to experimenting with and developing global solutions that manage the scheduling of applications while keeping chip temperature and power within budget.

The paper makes for an interesting read for anyone interested in experimenting with and developing power and temperature management solutions for MPSoCs, an active research area.