Digital signal processors (DSPs) often have very strict limitations on their cord size and power consumption. Many of them do not support base-plus-offset addressing mode to simplify their architecture implementations. In many of these irregular architectures, address generation units are implemented instead. The problem of using address generation units effectively to reduce the number of explicit address arithmetic instructions has become a hot topic in recent years due to the prevalence of DSPs in embedded systems.

In this paper, the authors provide integer linear programming (ILP) techniques to solve the offset assignment problem, which could generate optimal solutions in tradeoff algorithm runtime. More importantly, the authors integrate simple offset assignment and general offset assignment with variable coalescing and variable permutation. Experimental results with several concrete benchmarks show that combining variable coalescing with permutation dramatically reduces the instructions by more than half.

The authors carefully lay out the background information before venturing into the technical details. They explain the technical challenges and describe corresponding solutions. The experimental results provide proof that the proposed ILP algorithms are effective. I really enjoyed the paper, as its technical content and writing are both excellent.