The shrinking dimensions of devices place strong limitations on the continued use of dynamic random access memory (DRAM) architectures. Alternative technologies for memory circuits, including phase change memory (PCM), are now being pursued.

In this paper, Lee et al. present a survey of currently available PCM implementations. They present a baseline architecture for comparing PCM and DRAM architectures in terms of area, access delay, energy, and endurance. Compared to DRAM, the PCM architecture has longer latencies and consumes more energy. Rewrites increase the wear of PCM devices. The authors present effective buffer reorganization schemes that make PCM technology competitive with DRAM, at current technology nodes, in terms of energy and delay requirements. Partial rewrites also increase the endurance of a device.

PCM technology is more scalable than DRAM at future technology nodes. This results in reduced energy consumption, increased capacity, and greater endurance. PCM is also nonvolatile and has the potential for further energy savings. Lee et al. present a strong case for PCM memory over DRAM implementations, through consistent analysis.