Computing Reviews

Object-based hardware/software component interconnection model for interface design in system-on-a-chip circuits
Cesário W., Gauthier L., Lyonnard D., Nicolescu G., Jerraya A. Journal of Systems and Software70(3):229-244,2004.Type:Article
Date Reviewed: 09/28/04

The integration of complex electronic systems in a single silicon die, the so-called system-on-a-chip (SoC), relies strongly on the reuse of previously designed cores, which interact over an on-chip communication structure. One of the problems faced by SoC designers is actually the integration between those cores and the communication infrastructure, which is usually done by wrappers. These wrappers may be custom-designed, or follow a standard specification, such as those proposed by Virtual Socket Interface Alliance (VSIA), Open Core Protocol International Partnership (OCP-IP), and IBM.

In this paper, Cesário et al. advocate the automatic generation of custom wrappers. An object-based component model is proposed in order to model the dependencies of the communication interconnect and the various cores, which may be software tasks, processors, or custom logic blocks. Such dependencies are organized in a so-called virtual architecture, which abstracts the inter-core communication with simple message passing primitives. A set of automation tools, developed by the authors, is able to analyze the virtual architecture and, based on some parameterizations by the designer, generate wrappers that are synthesizable into co-simulation models, or actual interfaces between each core and the chosen on-chip interconnect.

The paper provides a detailed view of the object-based component model, and explains its modeling constructs using a unified modeling language (UML) class diagram. However, the detail process of wrapper generation (which differs for the co-simulation model, the software tasks, and the custom hardware cores) is not included in this paper. References to papers written by the same authors, on each of those techniques, are provided.

The paper closes with a case study, involving the partial design of a very high bit rate digital subscriber line (VDSL) modem. The approach proposed by the authors was used to automatically generate the hardware wrappers that integrate two ARM7 processor cores and a custom core for protocol processing. The operating systems that interface the software cores with each of the ARM7 cores were also generated automatically, and the authors claim to have achieved performance values that are comparable with commercial embedded operating systems, which usually have a larger footprint.

Reviewer:  Leandro Soares Indrusiak Review #: CR130190

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