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Compiler-based code generation and autotuning for geometric multigrid on GPU-accelerated supercomputers
Basu P., Williams S., Van Straalen B., Oliker L., Colella P., Hall M. Parallel Computing64  50-64,2017.Type:Article
Date Reviewed: Aug 30 2017

Basu et al. present a code generation and autotuning technique for geometric multigrid codes targeted for graphics processing unit (GPU)-accelerated supercomputers using the CUDA-CHiLL compilation framework.

Based on the publicly available miniGMG benchmark, the authors evaluate their approach by generating CUDA kernels for the four key operations in multigrid solvers: smooth, residual, restriction, and interpolation, all of which are stencil operations on regular grids. The generated code is evaluated on two supercomputers; it is reported that the automatically generated code matches or even slightly outperforms the corresponding manually tuned miniGMG code, due to the applied autotuning approach.

The paper is quite clearly written; several listings, including sequential C code used as input for the presented compilation framework, help readers better understand the proposed approach. In contrast to many existing related papers about stencil code optimization and generation, this paper focuses on optimizing key computation kernels of a complete iterative solver, rather than focusing on isolated single stencil computations.

The presented optimization of Gauss-Seidel red-black (GSBR) smoothers is especially interesting, since these codes are more challenging for optimizing compilers than the Jacobi smoothers usually targeted in recent research.

Reviewer:  Sergei Gorlatch Review #: CR145508 (1711-0739)
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Code Generation (D.3.4 ... )
 
 
Compilers (D.3.4 ... )
 
 
Graphics Processors (I.3.1 ... )
 
 
Super (Very Large) Computers (C.5.1 ... )
 
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