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Designing with Xilinx FPGAs : using Vivado
Churiwala S. (ed), Springer International Publishing, New York, NY, 2016. 260 pp. Type: Book (978-3-319424-37-8)
Date Reviewed: Apr 20 2017

This highly practical compendium of articles from different authors covers topics about, as the title of the book says, design methods using field-programmable gate array (FPGA) devices from the vendor Xilinx. FPGA devices are among the most used technologies to implement complex electronic devices because of their cost and the large set of tools available for them.

This book, after a short, traditional state-of-the-art presentation of FPGA devices, performs a review of tools and methods used in electronic design. These techniques are part of the Vivado suite, a large set of tools provided by Xilinx to help engineers reduce the time spent creating new designs, based on the reuse of previous modules called intellectual property (IP) and the utilization of high-level description techniques based on C, instead of traditional register-transfer level (RTL) methods with VHSIC Hardware Description Language (VHDL) or Verilog.

After a first read, it is clear that the book is not intended for engineers who are unfamiliar with Xilinx tools. The book is not a step-by-step guide to create designs and use the Vivado suite. I recommend the readers attain good knowledge of the tools prior to getting into the book in depth.

The introduction to Vivado is a brief six-page chapter; after that, the book takes an in-depth look at advanced topics like Internet protocol (IP) flows using Xilinx-provided modules like microprocessors or gigabit transceivers. As I commented before, you will find neither a step-by-step guide nor any source code. The chapters are detailed descriptions of the available modules containing valuable information, most of them written by Xilinx engineers.

Chapters 8 to 12 describe high-level C-based design, simulation, and synthesis. The RTL synthesis and simulation chapters describe the well-known process to simulate a design and get a model based on logic components from an RTL description in Verilog or VHDL. These processes are not new on Vivado and have been included in Xilinx tools for many years. It is important to describe them in a Xilinx FPGA book, but for people interested in them there are thousands of books to learn from.

“C-Based Design,” chapter 10, includes several code examples. It is a short but very well-written overview of the subject, talking for example about pipelining techniques, something essential to increase the performance of a design.

The last set of chapters are the most interesting, covering very advanced features of the new FPGA families, like stacked silicon interconnect (SSI) to create bigger devices, timing and power optimization, and advanced debugging and emulation techniques.

The last chapter presents the partial reconfiguration technique. This is not a new feature; it has been used for many years. The Vivado suite makes it simpler because of its intrinsic complexity. A good summary of the applications and design flow needed to create a design able to support partial reconfiguration is included.

The conclusion seems to be an extension of the Vivado user manual, presenting all the advanced features of the suite. It is clearly written, but it is not suitable for beginners to this world.

Reviewer:  Javier Castillo Review #: CR145207 (1707-0407)
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