VHSIC hardware description language (VHDL) is a fundamental language for circuit design. Most books on VHDL focus on language features, concurrency models, and signal update mechanisms: learning the basic coding techniques. How to improve the quality of VHDL designs is less of a concern in other titles.
The book is well organized in six parts (20 chapters). The index is sufficient, and the references are complete and precise. Besides the language description and principles, Part 5 (“Practical Coding Recommendation”) is the most attractive for learning. This part shares the author’s substantial experience with VHDL routines, naming, and coding style tips. It provides helpful rules for writing high-quality VHDL code. Although Ben Cohen’s famous book [1] also provides practical information on reusable software methodologies for the design of VHDL, it focuses less on how to write effective code.
Jasinski’s book is directed to engineers with a background in integrated circuit (IC) design and VHDL coding who want to improve their VHDL coding skills. I strongly recommend it to engineers and students in related areas. Since Verilog HDL is also widely used in circuit design, I am eager to see if the author will add information about his experiences with it in the book’s next edition.