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Tolerating transient illegal turn faults in NoCs
Huang L., Zhang X., Ebrahimi M., Li G. Microprocessors & Microsystems43 (C):104-115,2016.Type:Article
Date Reviewed: Jul 29 2016

Faults in on-chip level networks are very common. There have been multiple approaches to detect and correct faults in different levels, such as the error-detecting code (EDC) and error-correcting code (ECC) used in the data packet, cyclic redundancy check (CRC) and parity field used in the 802.11 a/b/g/n frame, the retry/discard mechanism defined in several bus protocols, and the very common solutions in the design flow like built-in self-test (BIST) and scan chain. In this paper, the authors present a scheme, online fault detection and tolerance (ODT), which focuses on the transient faults due to illegal turns of packets. Using ODT, the reliability of the on-chip network is improved and the faulty router is not necessarily turned off. Compared with the DyXY routing algorithm, the latency of transmission is almost the same when no faults occur. The deadlock can be reduced, and around 20 percent more packets can survive, on average.

In conclusion, the algorithm and the fault-detection method based on the authors’ previous works are novel. The implementation and evaluation are thorough and, indeed, show that the structure and the algorithm can be used efficiently for transient fault processing.

Reviewer:  Xiaokun Yang Review #: CR144648 (1611-0805)
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Reliability, Testing, And Fault-Tolerance (B.8.1 )
 
 
Microprocessors And Microcomputers (B.7.1 ... )
 
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