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Reliability-aware design to suppress aging
Amrouch H., Khaleghi B., Gerstlauerz A., Henkel J.  DAC 2016 (Proceedings of the 53rd Annual Design Automation Conference, Austin, TX, Jun 5-9, 2016)1-6.2016.Type:Proceedings
Date Reviewed: Jun 28 2016

In the biological world, humans age over time. Similar to this, small components like transistors in an electronic chip also age as the system runs. This will slow the system down and cause potential failures while the system is still running. Eventually this will lead to the end of the component’s life. For a modern processor, there are billions of such components; the failure of one component will have a high possibility of causing the whole system to fail. Due to high performance and power efficiency demands, technology scaling continues. One of the biggest challenges for downscaling is this aging issue. Therefore, dealing with such aging issues is very important to guarantee robustness for a resilient system.

Among the different aging mechanisms, bias temperature instability (BTI), which happens in single transistors, has been accepted as the most pronounced one; it slows down the circuit and causes timing violations. Although it is a physical-level issue, the effect can be introduced to upper levels, like the system and application levels. Since BTI is gaining more interest recently, bringing it into the design flow and tools is necessary. In this paper, Amrouch et al. propose a set of BTI-aware cell libraries that can be used directly in electronic design automation tools for synthesizing and timing analysis. Different from other previous work, this paper considers both threshold voltage (Vth) and mobility affected by BTI. The paper also demonstrates that the impact of BTI is highly dependent on the operating conditions of the circuit (for example, signal slew and output capacitance); these factors have been ignored in the previous literature, which can lead to overdesign. This paper also quantifies the impact of BTI at the system level by plugging the cell libraries into an image processing application. Overall, the paper shows the importance and necessity of considering BTI during the design phase, and the proposed library will serve perfectly for this purpose.

The proposed BTI-aware cell library will be very useful for the reliability research community since, until now, there have been few circuit-level simulation solutions for capturing the transient behavior of BTI. The introduction of such a library will provide circuit designers with the ability to easily design robust circuits in an early phase by considering all of the metrics, including power, performance, area, and reliability.

Reviewer:  Xinfei Guo Review #: CR144536 (1609-0652)
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